From patchwork Wed Oct 4 18:43:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 821452 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="OX11Atcb"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y6lL673Tcz9t2x for ; Thu, 5 Oct 2017 05:49:02 +1100 (AEDT) Received: from localhost ([::1]:36453 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dzoj7-00042Z-1h for incoming@patchwork.ozlabs.org; Wed, 04 Oct 2017 14:49:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38200) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dzodu-0008DY-EU for qemu-devel@nongnu.org; Wed, 04 Oct 2017 14:43:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dzodt-0002gV-MR for qemu-devel@nongnu.org; Wed, 04 Oct 2017 14:43:38 -0400 Received: from mail-qt0-x232.google.com ([2607:f8b0:400d:c0d::232]:53435) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dzodt-0002g5-Im for qemu-devel@nongnu.org; Wed, 04 Oct 2017 14:43:37 -0400 Received: by mail-qt0-x232.google.com with SMTP id 47so21026765qts.10 for ; Wed, 04 Oct 2017 11:43:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uisqqIVUgFIrHPus0ecknWYXNomHu+IslQvv6H/fmw8=; b=OX11AtcbS23GaT9AN45kbl4z/hyqs8j+YXJruF71f6TJl+bOPofh9WhXVWAdq/8/ZV XTUw05l9jYfr9iniWwjVkCia6N9N2LSqm3U0S2mLFNNmp84Sqec2RGAg3mJx3eGmO2uR aO9nA6eUtDlUAcLLO0jdI1TWuTSwYsCKtYmzI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uisqqIVUgFIrHPus0ecknWYXNomHu+IslQvv6H/fmw8=; b=p7W/9QXl2y1hemVevTsFJNa/3x/zQBQLzMi09k6PkQmZCXY60gP9YAcAWrT4RX6Y2y zY8hTFSiae8suiDFh46Yqqz9bQW3Qakyq/WYHXVTS6NmNDsDSXDxUltn7bjiWB3VU+y+ 6pTUUkRO+zHKxKX3JBUhhtffah6GT/qxCsLjvtXlkInkwMfWdbQ5V0hCojZ8wux/snw1 8lOxi+QYbOkkeE4KyZ8nMKiftTprphCRrXgSYFQ+YMYwHSdPlDROtlBgEfmUvZeTjO+l B8HAFhLUf3QyYzrr73osz/aE1V5gMflAade1VljG33AwkRb8qOVX/rPQpF7JIDQqZoFt H3Cg== X-Gm-Message-State: AMCzsaU5SMiqidXVEmGEzanMcS/LgK5PqcFA7AmDIFuS+sbbgwQLjdGg 5mvtLwcm5hlepAOcyf/L0L6s0vVgtRI= X-Google-Smtp-Source: AOwi7QADJbeOYSktv7pK1O8qrIGm4sWM8iFEqJ8yEZJ3LTXr7Elyik3S5uUhiiT9oO8ZRMYAmPvLiA== X-Received: by 10.37.189.136 with SMTP id f8mr4683256ybh.437.1507142616678; Wed, 04 Oct 2017 11:43:36 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2606:a000:7a4a:b100::1b]) by smtp.gmail.com with ESMTPSA id o64sm3020464ywe.12.2017.10.04.11.43.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Oct 2017 11:43:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 4 Oct 2017 14:43:18 -0400 Message-Id: <20171004184325.24157-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171004184325.24157-1-richard.henderson@linaro.org> References: <20171004184325.24157-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::232 Subject: [Qemu-devel] [PATCH v1 05/12] target/arm: Decode aa64 armv8.1 scalar/vector x indexed element X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée --- target/arm/translate-a64.c | 46 ++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 40 insertions(+), 6 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 0ea47a9dff..b02aad8cd7 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -10749,12 +10749,23 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) is_long = true; /* fall through */ case 0xc: /* SQDMULH */ - case 0xd: /* SQRDMULH */ if (u) { unallocated_encoding(s); return; } break; + case 0xd: /* SQRDMULH / SQRDMLAH */ + if (u && !arm_dc_feature(s, ARM_FEATURE_V8_1_SIMD)) { + unallocated_encoding(s); + return; + } + break; + case 0xf: /* SQRDMLSH */ + if (!u || !arm_dc_feature(s, ARM_FEATURE_V8_1_SIMD)) { + unallocated_encoding(s); + return; + } + break; case 0x8: /* MUL */ if (u || is_scalar) { unallocated_encoding(s); @@ -10941,13 +10952,36 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) tcg_op, tcg_idx); } break; - case 0xd: /* SQRDMULH */ + case 0xd: /* SQRDMULH / SQRDMLAH */ + if (u) { /* SQRDMLAH */ + read_vec_element_i32(s, tcg_res, rd, pass, + is_scalar ? size : MO_32); + if (size == 1) { + gen_helper_neon_qrdmlah_s16(tcg_res, cpu_env, + tcg_op, tcg_idx, tcg_res); + } else { + gen_helper_neon_qrdmlah_s32(tcg_res, cpu_env, + tcg_op, tcg_idx, tcg_res); + } + } else { /* SQRDMULH */ + if (size == 1) { + gen_helper_neon_qrdmulh_s16(tcg_res, cpu_env, + tcg_op, tcg_idx); + } else { + gen_helper_neon_qrdmulh_s32(tcg_res, cpu_env, + tcg_op, tcg_idx); + } + } + break; + case 0xf: /* SQRDMLSH */ + read_vec_element_i32(s, tcg_res, rd, pass, + is_scalar ? size : MO_32); if (size == 1) { - gen_helper_neon_qrdmulh_s16(tcg_res, cpu_env, - tcg_op, tcg_idx); + gen_helper_neon_qrdmlsh_s16(tcg_res, cpu_env, + tcg_op, tcg_idx, tcg_res); } else { - gen_helper_neon_qrdmulh_s32(tcg_res, cpu_env, - tcg_op, tcg_idx); + gen_helper_neon_qrdmlsh_s32(tcg_res, cpu_env, + tcg_op, tcg_idx, tcg_res); } break; default: