Message ID | 20170829204934.9039-4-jsnow@redhat.com |
---|---|
State | New |
Headers | show |
Series | IDE: replace printfs with tracing | expand |
On 08/29/2017 05:49 PM, John Snow wrote: > To be used sparingly, but still interesting in the case of small > firmwares designed to reproduce bugs in QEMU IDE. > > Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/ide/core.c | 12 +++++++++++- > hw/ide/trace-events | 5 +++++ > 2 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/hw/ide/core.c b/hw/ide/core.c > index cb250e6..82a19b1 100644 > --- a/hw/ide/core.c > +++ b/hw/ide/core.c > @@ -2259,6 +2259,8 @@ void ide_data_writew(void *opaque, uint32_t addr, uint32_t val) > IDEState *s = idebus_active_if(bus); > uint8_t *p; > > + trace_ide_data_writew(addr, val, bus, s); > + > /* PIO data access allowed only when DRQ bit is set. The result of a write > * during PIO out is indeterminate, just ignore it. */ > if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) { > @@ -2304,6 +2306,8 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr) > s->status &= ~DRQ_STAT; > s->end_transfer_func(s); > } > + > + trace_ide_data_readw(addr, ret, bus, s); > return ret; > } > > @@ -2313,6 +2317,8 @@ void ide_data_writel(void *opaque, uint32_t addr, uint32_t val) > IDEState *s = idebus_active_if(bus); > uint8_t *p; > > + trace_ide_data_writel(addr, val, bus, s); > + > /* PIO data access allowed only when DRQ bit is set. The result of a write > * during PIO out is indeterminate, just ignore it. */ > if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) { > @@ -2343,7 +2349,8 @@ uint32_t ide_data_readl(void *opaque, uint32_t addr) > /* PIO data access allowed only when DRQ bit is set. The result of a read > * during PIO in is indeterminate, return 0 and don't move forward. */ > if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) { > - return 0; > + ret = 0; > + goto out; > } > > p = s->data_ptr; > @@ -2358,6 +2365,9 @@ uint32_t ide_data_readl(void *opaque, uint32_t addr) > s->status &= ~DRQ_STAT; > s->end_transfer_func(s); > } > + > +out: > + trace_ide_data_readl(addr, ret, bus, s); > return ret; > } > > diff --git a/hw/ide/trace-events b/hw/ide/trace-events > index bff8f39..17bc6f1 100644 > --- a/hw/ide/trace-events > +++ b/hw/ide/trace-events > @@ -6,6 +6,11 @@ ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s > ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" > ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p; IDEState %p" > ide_cmd_write(uint32_t addr, uint32_t val, void *bus) "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus %p" > +# Warning: verbose > +ide_data_readw(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p; IDEState %p" > +ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p; IDEState %p" > +ide_data_readl(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus %p; IDEState %p" > +ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus %p; IDEState %p" > # misc > ide_exec_cmd(void *bus, void *state, uint32_t cmd) "IDE exec cmd: bus %p; state %p; cmd 0x%02x" > ide_cancel_dma_sync_buffered(void *fn, void *req) "invoking cb %p of buffered request %p with -ECANCELED" >
diff --git a/hw/ide/core.c b/hw/ide/core.c index cb250e6..82a19b1 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -2259,6 +2259,8 @@ void ide_data_writew(void *opaque, uint32_t addr, uint32_t val) IDEState *s = idebus_active_if(bus); uint8_t *p; + trace_ide_data_writew(addr, val, bus, s); + /* PIO data access allowed only when DRQ bit is set. The result of a write * during PIO out is indeterminate, just ignore it. */ if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) { @@ -2304,6 +2306,8 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr) s->status &= ~DRQ_STAT; s->end_transfer_func(s); } + + trace_ide_data_readw(addr, ret, bus, s); return ret; } @@ -2313,6 +2317,8 @@ void ide_data_writel(void *opaque, uint32_t addr, uint32_t val) IDEState *s = idebus_active_if(bus); uint8_t *p; + trace_ide_data_writel(addr, val, bus, s); + /* PIO data access allowed only when DRQ bit is set. The result of a write * during PIO out is indeterminate, just ignore it. */ if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) { @@ -2343,7 +2349,8 @@ uint32_t ide_data_readl(void *opaque, uint32_t addr) /* PIO data access allowed only when DRQ bit is set. The result of a read * during PIO in is indeterminate, return 0 and don't move forward. */ if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) { - return 0; + ret = 0; + goto out; } p = s->data_ptr; @@ -2358,6 +2365,9 @@ uint32_t ide_data_readl(void *opaque, uint32_t addr) s->status &= ~DRQ_STAT; s->end_transfer_func(s); } + +out: + trace_ide_data_readl(addr, ret, bus, s); return ret; } diff --git a/hw/ide/trace-events b/hw/ide/trace-events index bff8f39..17bc6f1 100644 --- a/hw/ide/trace-events +++ b/hw/ide/trace-events @@ -6,6 +6,11 @@ ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p; IDEState %p" ide_cmd_write(uint32_t addr, uint32_t val, void *bus) "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus %p" +# Warning: verbose +ide_data_readw(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p; IDEState %p" +ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p; IDEState %p" +ide_data_readl(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus %p; IDEState %p" +ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus %p; IDEState %p" # misc ide_exec_cmd(void *bus, void *state, uint32_t cmd) "IDE exec cmd: bus %p; state %p; cmd 0x%02x" ide_cancel_dma_sync_buffered(void *fn, void *req) "invoking cb %p of buffered request %p with -ECANCELED"
To be used sparingly, but still interesting in the case of small firmwares designed to reproduce bugs in QEMU IDE. Signed-off-by: John Snow <jsnow@redhat.com> --- hw/ide/core.c | 12 +++++++++++- hw/ide/trace-events | 5 +++++ 2 files changed, 16 insertions(+), 1 deletion(-)