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[80.197.57.18]) by smtp.gmail.com with ESMTPSA id t7sm1412106ljd.31.2017.07.13.14.51.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jul 2017 14:51:38 -0700 (PDT) From: Ricardo Ribalda Delgado To: Richard Henderson , qemu-devel@nongnu.org, ehabkost@redhat.com, pbonzini@redhat.com Date: Thu, 13 Jul 2017 23:51:37 +0200 Message-Id: <20170713215137.5307-1-ricardo.ribalda@gmail.com> X-Mailer: git-send-email 2.13.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::241 Subject: [Qemu-devel] [PATCH] target/i386: Fix ANDN (bmi) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ricardo Ribalda Delgado Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Operands on ANDN are swapped. Tested with the following function: long test_andn(long v1, long v2){ return (~v1 & v2); } Compiled with: gcc kk.c -mbmi -O3 -Wall 0000000000000910 : 910:c4 e2 c0 f2 c6 andn %rsi,%rdi,%rax 915:c3 retq 916:66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1) 91d:00 00 00 and gcc kk.c -march=native -O3 -Wall 0000000000000930 : 930: 48 f7 d7 not %rdi 933: 48 89 f8 mov %rdi,%rax 936: 48 21 f0 and %rsi,%rax 939: c3 retq 93a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1) The test showed than -mbmi version behaved differently than the -march native version. Signed-off-by: Ricardo Ribalda Delgado --- target/i386/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 203623ef884c..1f39b497c19a 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -3774,7 +3774,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, } ot = mo_64_32(s->dflag); gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); - tcg_gen_andc_tl(cpu_T0, cpu_regs[s->vex_v], cpu_T0); + tcg_gen_andc_tl(cpu_T0, cpu_T0, cpu_regs[s->vex_v]); gen_op_mov_reg_v(ot, reg, cpu_T0); gen_op_update1_cc(); set_cc_op(s, CC_OP_LOGICB + ot);