From patchwork Tue Jul 11 17:59:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 786790 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3x6VN10Jgkz9ryk for ; Wed, 12 Jul 2017 04:04:33 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="SQURLSEb"; dkim-atps=neutral Received: from localhost ([::1]:48120 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUzWQ-0004oU-P7 for incoming@patchwork.ozlabs.org; Tue, 11 Jul 2017 14:04:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56272) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUzSu-0002WS-0R for qemu-devel@nongnu.org; Tue, 11 Jul 2017 14:00:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dUzSq-0005HG-Q8 for qemu-devel@nongnu.org; Tue, 11 Jul 2017 14:00:52 -0400 Received: from mail-wr0-f177.google.com ([209.85.128.177]:32853) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dUzSq-0005G0-KE for qemu-devel@nongnu.org; Tue, 11 Jul 2017 14:00:48 -0400 Received: by mail-wr0-f177.google.com with SMTP id r103so9571833wrb.0 for ; Tue, 11 Jul 2017 11:00:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=x2o5mdP7zuD828LkB7mQtBhpict2fQOo3TsMXHlbqVQ=; b=SQURLSEbmMsBxeGSV/TrY7oZTfR9/Kvv2Ex88B9UTJ4NwlobhIetBT4BoRSpqdM4QE EPNMgDgcjzUtnMKQ95k8DOh6I5r+bkRzlt9kQF3fsMHqgE7eyYhTGHNzdb38Kt92YZFD F204zdTsAP0NVQy3LuNfMGTFZcv1j+CB6hRb0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=x2o5mdP7zuD828LkB7mQtBhpict2fQOo3TsMXHlbqVQ=; b=Zxizq811wtxquZJdgs0HMdUr1XkWMWkhz6/nbwAY5aYQsbifHwTunwiH6p+YFtmBdj tztbGVsqhetqL2jnjK0fTU3Z8ruzkWwjqwMNV09DH/gJq8xMTSrbtX0vPH+7BvR3TXUz Jmp7EywuIni/JXQ4mo/yina17HWkqCA1JfT6u0T+6jf/3WK0hSaPDicgPWf7uTY33M5N 4q4QxJNaFC/Ny1bKUYAIiqqNHHy31rl1XiIwlReMl6DvIRn+xhB2DfrIWsyX2CY0etoQ 9uWIeFMRCIE46ZEm5AX6piclx39r9A9YvPcrUe1j4OuUgVlsYSSugj4b9+qc9TisqFCv 9XQA== X-Gm-Message-State: AIVw110ulf+SrCviZLaGdXvna5NxzVi1QrRdmBl23ba+P0bJuoLLtyLP hiV/vKrgo6De2Al8 X-Received: by 10.28.133.76 with SMTP id h73mr12314205wmd.92.1499795987436; Tue, 11 Jul 2017 10:59:47 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id g66sm13986221wmc.6.2017.07.11.10.59.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Jul 2017 10:59:42 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 5C5593E0F9A; Tue, 11 Jul 2017 18:59:38 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net, cota@braap.org Date: Tue, 11 Jul 2017 18:59:37 +0100 Message-Id: <20170711175937.23140-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170711175937.23140-1-alex.bennee@linaro.org> References: <20170711175937.23140-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.177 Subject: [Qemu-devel] [PATCH v3 6/6] target/arm: use DISAS_EXIT for eret handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Joakim Bech , Etienne Carriere , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, "open list:ARM" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Previously DISAS_JUMP did ensure this but with the optimisation of 8a6b28c7 (optimize indirect branches) we might not leave the loop. This means if any pending interrupts are cleared by changing IRQ flags we might never get around to servicing them. You usually notice this by seeing the lookup_tb_ptr() helper gainfully chaining TBs together while cpu->interrupt_request remains high and the exit_request has not been set. This breaks amongst other things the OPTEE test suite which executes an eret from the secure world after a non-secure world IRQ has gone pending which then never gets serviced. Instead of using the previously implied semantics of DISAS_JUMP we use DISAS_EXIT which will always exit the run-loop. CC: Etienne Carriere CC: Joakim Bech CC: Peter Maydell CC: Emilio G. Cota Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Reviewed-by: Emilio G. Cota --- target/arm/translate-a64.c | 3 ++- target/arm/translate.c | 6 ++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2ac565eb10..3fa39023ca 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1788,7 +1788,8 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) return; } gen_helper_exception_return(cpu_env); - s->is_jmp = DISAS_JUMP; + /* Must exit loop to check un-masked IRQs */ + s->is_jmp = DISAS_EXIT; return; case 5: /* DRPS */ if (rn != 0x1f) { diff --git a/target/arm/translate.c b/target/arm/translate.c index dbf919cce3..f1023d5263 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4479,7 +4479,8 @@ static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr) */ gen_helper_cpsr_write_eret(cpu_env, cpsr); tcg_temp_free_i32(cpsr); - s->is_jmp = DISAS_JUMP; + /* Must exit loop to check un-masked IRQs */ + s->is_jmp = DISAS_EXIT; } /* Generate an old-style exception return. Marks pc as dead. */ @@ -9523,7 +9524,8 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) tmp = load_cpu_field(spsr); gen_helper_cpsr_write_eret(cpu_env, tmp); tcg_temp_free_i32(tmp); - s->is_jmp = DISAS_JUMP; + /* Must exit loop to check un-masked IRQs */ + s->is_jmp = DISAS_EXIT; } } break;