From patchwork Fri Jun 2 16:08:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 770474 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wfTpB2QnQz9s2P for ; Sat, 3 Jun 2017 02:15:30 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="BEV1Hzk/"; dkim-atps=neutral Received: from localhost ([::1]:50600 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGpEV-0003Xx-Ug for incoming@patchwork.ozlabs.org; Fri, 02 Jun 2017 12:15:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54426) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGp7x-0005xx-Cn for qemu-devel@nongnu.org; Fri, 02 Jun 2017 12:08:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dGp7w-0004zp-Ah for qemu-devel@nongnu.org; Fri, 02 Jun 2017 12:08:41 -0400 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]:37107) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dGp7w-0004zA-4V for qemu-devel@nongnu.org; Fri, 02 Jun 2017 12:08:40 -0400 Received: by mail-wm0-x22e.google.com with SMTP id d127so30557701wmf.0 for ; Fri, 02 Jun 2017 09:08:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=m2Sj5CrIL6xhDtC2TyR+kCFC63AH4THHdbHxe3URKPE=; b=BEV1Hzk/Fq8Co8geNljD3BD3cxgPHOA76lXXy/FyBKYPG+vOT+sVG6pqRCkmiYZoTm w3tKI1UNtldQRMLxYzsacA70esKGYejmHGRpf98fDI2HwHDqmQMwgBb2fftHyBHyJHwK x9DXTfaQdLz+cuXikkp9aCRqANLljlgCP0aZ4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=m2Sj5CrIL6xhDtC2TyR+kCFC63AH4THHdbHxe3URKPE=; b=bQjVyM7U5yFMwlmIynNyk2fKKn5aX8/Nzv9+w52vFNmoteEy7Jb8ir/bJhvwrRA1Az /qelmxl3EG6nf5g7ty93vHqxlEnCrgHCTMITkUA+o2YGxwH7tA2aOAWqiXtx7zdSgM3u NHuAfHbdkorqc7sWC26f5dWlmfHydx/bMZW/yqRLuEUeXe3kGwbLHzZur8IARbAdLeRG 8JWOqGYovk1lyR8RXNQ4xdsUBoGlOXyCYT93XJ4eLiA/foHG/UZY3mqj0UJhYeVUI/44 RjBQh4X56ViXNwIRaD+JSHp3Se5okIC6VjD41h34h8zbhTnR1/x7ly+6suyRNADLKXZ1 SnQQ== X-Gm-Message-State: AODbwcCfVcH4fqLfeX47IwEhwIGQkOSvFv0BE0qK/GIBftQMYSp6D9Wa tGvbg+XqHRhdHgro X-Received: by 10.28.135.82 with SMTP id j79mr69742wmd.10.1496419719145; Fri, 02 Jun 2017 09:08:39 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id 39sm23892416wru.50.2017.06.02.09.08.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Jun 2017 09:08:36 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 8A2993E0334; Fri, 2 Jun 2017 17:08:54 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Date: Fri, 2 Jun 2017 17:08:42 +0100 Message-Id: <20170602160848.4913-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170602160848.4913-1-alex.bennee@linaro.org> References: <20170602160848.4913-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::22e Subject: [Qemu-devel] [RISU PATCH v4 04/10] risu: a bit more verbosity when running X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Before this is could seem a little quite when running as you had no indication stuff was happening (or how fast). I only dump on the master side as I want to minimise the amount of qemu logs to sift through. Signed-off-by: Alex Bennée --- v3 - use portable fmt string for image_start_address - include arm dumping position --- risu.c | 15 +++++++++++++-- risu.h | 3 +++ risu_aarch64.c | 3 +++ risu_arm.c | 3 +++ 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/risu.c b/risu.c index 7e42160..bcdc219 100644 --- a/risu.c +++ b/risu.c @@ -37,6 +37,16 @@ sigjmp_buf jmpbuf; /* Should we test for FP exception status bits? */ int test_fp_exc = 0; +long executed_tests = 0; +void report_test_status(void *pc) +{ + executed_tests += 1; + if (executed_tests % 100 == 0) { + fprintf(stderr,"Executed %ld test instructions (pc=%p)\r", + executed_tests, pc); + } +} + void master_sigill(int sig, siginfo_t *si, void *uc) { switch (recv_and_compare_register_info(master_socket, uc)) @@ -61,6 +71,7 @@ void apprentice_sigill(int sig, siginfo_t *si, void *uc) return; case 1: /* end of test */ + fprintf(stderr, "\nend of test\n"); exit(0); default: /* mismatch */ @@ -129,7 +140,7 @@ int master(int sock) } master_socket = sock; set_sigill_handler(&master_sigill); - fprintf(stderr, "starting image\n"); + fprintf(stderr, "starting master image at 0x%"PRIxPTR"\n", image_start_address); image_start(); fprintf(stderr, "image returned unexpectedly\n"); exit(1); @@ -139,7 +150,7 @@ int apprentice(int sock) { apprentice_socket = sock; set_sigill_handler(&apprentice_sigill); - fprintf(stderr, "starting image\n"); + fprintf(stderr, "starting apprentice image at 0x%"PRIxPTR"\n", image_start_address); image_start(); fprintf(stderr, "image returned unexpectedly\n"); exit(1); diff --git a/risu.h b/risu.h index 883bcf7..1eeb885 100644 --- a/risu.h +++ b/risu.h @@ -37,6 +37,7 @@ extern uintptr_t image_start_address; extern void *memblock; extern int test_fp_exc; +extern int ismaster; /* Ops code under test can request from risu: */ #define OP_COMPARE 0 @@ -72,6 +73,8 @@ int recv_and_compare_register_info(int sock, void *uc); */ int report_match_status(void); +void report_test_status(void *pc); + /* Interface provided by CPU-specific code: */ /* Move the PC past this faulting insn by adjusting ucontext diff --git a/risu_aarch64.c b/risu_aarch64.c index 9c6809d..5625979 100644 --- a/risu_aarch64.c +++ b/risu_aarch64.c @@ -16,6 +16,9 @@ void advance_pc(void *vuc) { ucontext_t *uc = vuc; uc->uc_mcontext.pc += 4; + if (ismaster) { + report_test_status((void *) uc->uc_mcontext.pc); + } } void set_ucontext_paramreg(void *vuc, uint64_t value) diff --git a/risu_arm.c b/risu_arm.c index f570828..eaf4f6c 100644 --- a/risu_arm.c +++ b/risu_arm.c @@ -44,6 +44,9 @@ void advance_pc(void *vuc) { ucontext_t *uc = vuc; uc->uc_mcontext.arm_pc += insnsize(uc); + if (ismaster) { + report_test_status((void *) uc->uc_mcontext.arm_pc); + } }