From patchwork Fri May 12 23:38:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 761882 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wPmfm6qjyz9s7w for ; Sat, 13 May 2017 09:40:00 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="O0yC+jXR"; dkim-atps=neutral Received: from localhost ([::1]:55672 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAA-0000Ev-KU for incoming@patchwork.ozlabs.org; Fri, 12 May 2017 19:39:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44928) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9K9O-00007j-P1 for qemu-devel@nongnu.org; Fri, 12 May 2017 19:39:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9K9N-0002hp-Mi for qemu-devel@nongnu.org; Fri, 12 May 2017 19:39:10 -0400 Received: from mail-qt0-x242.google.com ([2607:f8b0:400d:c0d::242]:34993) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9K9N-0002hC-Hs; Fri, 12 May 2017 19:39:09 -0400 Received: by mail-qt0-x242.google.com with SMTP id r58so8704141qtb.2; Fri, 12 May 2017 16:39:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2++k+AdA7af4sNJ49pYD1irHLuJnTcbXYPbUK2LfqFM=; b=O0yC+jXR/eoqTISjsZfOrkq8wjoIsXFSJ9z8DYhs7gUq8HuVC/asDv0+yv+v+e8Lf+ vaxUX9PIJDk+S1fpsO4phSVj5m1hi5Uhycnj1OrrCE6OB0XnGSqiPzpmrm0K+9+8lcyB rn+G4bfh/B7Qrf4uG19mSkWlsoNang5FHmK6WLXtCHc0sUBlVnknTwyau/WZ1fmt3tTc pJquZkGy2Nckv6r8dacsZsbNTxcXSMDdyFudiFzb3X+q2oisYtevoTeOy+XDkphC6AJH YW9eLGi0U9XIOFjD/m3hbkYDe+rm8hiiNEdb5b1vQ4goFEApzrbmQGrAgqMtVIbs6tvL Hdvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=2++k+AdA7af4sNJ49pYD1irHLuJnTcbXYPbUK2LfqFM=; b=pQ/yTRcWwSPJxy6+9+APsQL9tVuPzTvZ3mADBEBq/FeqTMN3zXzIyDix1+uhW0VQBx gu29MujrqtBUSBDrvFAvse0VDk9OGaD9vAqS1a63/igCZRoUTjnt+3STqrW2e7m5GIvJ YKBK33DhDMZb59HyWJiJGxgJv5qTJw1MthT9RQ2ZhpO8Fs/UubWxUdmiXckCd4KUyyFH wIphEekTvjYVu0tdXEpgHjXcpWsgC9uU33Cc04imYgIrw2HJZm7MjXfuxbIyyfnSV5FM JYithlaVDg6FUmiOeVXwdLOfjenfXBPBoaQN1rbvd3Bd3qe3GIhnLyZkfHfaxLmn9enM /uXw== X-Gm-Message-State: AODbwcByrk/ZB80wAWhw7jJUa/z1NzxWIC5uSOoyAGrzpXtnfi1duTj3 9RtHspyl9GN71w== X-Received: by 10.200.56.156 with SMTP id f28mr6341020qtc.252.1494632349028; Fri, 12 May 2017 16:39:09 -0700 (PDT) Received: from localhost.localdomain ([138.117.48.226]) by smtp.gmail.com with ESMTPSA id n78sm3253857qki.60.2017.05.12.16.39.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:39:08 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Aurelien Jarno , Richard Henderson , David Gibson , Alexander Graf , qemu-ppc@nongnu.org Date: Fri, 12 May 2017 20:38:42 -0300 Message-Id: <20170512233843.27713-6-f4bug@amsat.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170512233843.27713-1-f4bug@amsat.org> References: <20170512233843.27713-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::242 Subject: [Qemu-devel] [PATCH v4 5/6] target/ppc: optimize various functions using extract op X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically using Coccinelle script via: $ spatch --macro-file scripts/cocci-macro-file.h --in-place \ --sp-file scripts/coccinelle/tcg_gen_extract.cocci --dir target Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Acked-by: David Gibson --- target/ppc/translate.c | 21 +++++++-------------- target/ppc/translate/vsx-impl.inc.c | 24 ++++++++---------------- 2 files changed, 15 insertions(+), 30 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index f40b5a1abf..6521365bfa 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -868,8 +868,7 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1, } tcg_gen_xor_tl(cpu_ca, t0, t1); /* bits changed w/ carry */ tcg_temp_free(t1); - tcg_gen_shri_tl(cpu_ca, cpu_ca, 32); /* extract bit 32 */ - tcg_gen_andi_tl(cpu_ca, cpu_ca, 1); + tcg_gen_extract_tl(cpu_ca, cpu_ca, 32, 1); if (is_isa300(ctx)) { tcg_gen_mov_tl(cpu_ca32, cpu_ca); } @@ -1399,8 +1398,7 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1, tcg_temp_free(inv1); tcg_gen_xor_tl(cpu_ca, t0, t1); /* bits changes w/ carry */ tcg_temp_free(t1); - tcg_gen_shri_tl(cpu_ca, cpu_ca, 32); /* extract bit 32 */ - tcg_gen_andi_tl(cpu_ca, cpu_ca, 1); + tcg_gen_extract_tl(cpu_ca, cpu_ca, 32, 1); if (is_isa300(ctx)) { tcg_gen_mov_tl(cpu_ca32, cpu_ca); } @@ -4310,8 +4308,7 @@ static void gen_mfsrin(DisasContext *ctx) CHK_SV; t0 = tcg_temp_new(); - tcg_gen_shri_tl(t0, cpu_gpr[rB(ctx->opcode)], 28); - tcg_gen_andi_tl(t0, t0, 0xF); + tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], cpu_env, t0); tcg_temp_free(t0); #endif /* defined(CONFIG_USER_ONLY) */ @@ -4342,8 +4339,7 @@ static void gen_mtsrin(DisasContext *ctx) CHK_SV; t0 = tcg_temp_new(); - tcg_gen_shri_tl(t0, cpu_gpr[rB(ctx->opcode)], 28); - tcg_gen_andi_tl(t0, t0, 0xF); + tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); gen_helper_store_sr(cpu_env, t0, cpu_gpr[rD(ctx->opcode)]); tcg_temp_free(t0); #endif /* defined(CONFIG_USER_ONLY) */ @@ -4377,8 +4373,7 @@ static void gen_mfsrin_64b(DisasContext *ctx) CHK_SV; t0 = tcg_temp_new(); - tcg_gen_shri_tl(t0, cpu_gpr[rB(ctx->opcode)], 28); - tcg_gen_andi_tl(t0, t0, 0xF); + tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], cpu_env, t0); tcg_temp_free(t0); #endif /* defined(CONFIG_USER_ONLY) */ @@ -4409,8 +4404,7 @@ static void gen_mtsrin_64b(DisasContext *ctx) CHK_SV; t0 = tcg_temp_new(); - tcg_gen_shri_tl(t0, cpu_gpr[rB(ctx->opcode)], 28); - tcg_gen_andi_tl(t0, t0, 0xF); + tcg_gen_extract_tl(t0, cpu_gpr[rB(ctx->opcode)], 28, 4); gen_helper_store_sr(cpu_env, t0, cpu_gpr[rS(ctx->opcode)]); tcg_temp_free(t0); #endif /* defined(CONFIG_USER_ONLY) */ @@ -5383,8 +5377,7 @@ static void gen_mfsri(DisasContext *ctx) CHK_SV; t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - tcg_gen_shri_tl(t0, t0, 28); - tcg_gen_andi_tl(t0, t0, 0xF); + tcg_gen_extract_tl(t0, t0, 28, 4); gen_helper_load_sr(cpu_gpr[rd], cpu_env, t0); tcg_temp_free(t0); if (ra != 0 && ra != rd) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 7f12908029..85ed135d44 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1248,8 +1248,7 @@ static void gen_xsxexpdp(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_VSXU); return; } - tcg_gen_shri_i64(rt, cpu_vsrh(xB(ctx->opcode)), 52); - tcg_gen_andi_i64(rt, rt, 0x7FF); + tcg_gen_extract_i64(rt, cpu_vsrh(xB(ctx->opcode)), 52, 11); } static void gen_xsxexpqp(DisasContext *ctx) @@ -1262,8 +1261,7 @@ static void gen_xsxexpqp(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_VSXU); return; } - tcg_gen_shri_i64(xth, xbh, 48); - tcg_gen_andi_i64(xth, xth, 0x7FFF); + tcg_gen_extract_i64(xth, xbh, 48, 15); tcg_gen_movi_i64(xtl, 0); } @@ -1323,8 +1321,7 @@ static void gen_xsxsigdp(DisasContext *ctx) zr = tcg_const_i64(0); nan = tcg_const_i64(2047); - tcg_gen_shri_i64(exp, cpu_vsrh(xB(ctx->opcode)), 52); - tcg_gen_andi_i64(exp, exp, 0x7FF); + tcg_gen_extract_i64(exp, cpu_vsrh(xB(ctx->opcode)), 52, 11); tcg_gen_movi_i64(t0, 0x0010000000000000); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); @@ -1352,8 +1349,7 @@ static void gen_xsxsigqp(DisasContext *ctx) zr = tcg_const_i64(0); nan = tcg_const_i64(32767); - tcg_gen_shri_i64(exp, cpu_vsrh(rB(ctx->opcode) + 32), 48); - tcg_gen_andi_i64(exp, exp, 0x7FFF); + tcg_gen_extract_i64(exp, cpu_vsrh(rB(ctx->opcode) + 32), 48, 15); tcg_gen_movi_i64(t0, 0x0001000000000000); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); @@ -1448,10 +1444,8 @@ static void gen_xvxexpdp(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_VSXU); return; } - tcg_gen_shri_i64(xth, xbh, 52); - tcg_gen_andi_i64(xth, xth, 0x7FF); - tcg_gen_shri_i64(xtl, xbl, 52); - tcg_gen_andi_i64(xtl, xtl, 0x7FF); + tcg_gen_extract_i64(xth, xbh, 52, 11); + tcg_gen_extract_i64(xtl, xbl, 52, 11); } GEN_VSX_HELPER_2(xvxsigsp, 0x00, 0x04, 0, PPC2_ISA300) @@ -1474,16 +1468,14 @@ static void gen_xvxsigdp(DisasContext *ctx) zr = tcg_const_i64(0); nan = tcg_const_i64(2047); - tcg_gen_shri_i64(exp, xbh, 52); - tcg_gen_andi_i64(exp, exp, 0x7FF); + tcg_gen_extract_i64(exp, xbh, 52, 11); tcg_gen_movi_i64(t0, 0x0010000000000000); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); tcg_gen_andi_i64(xth, xbh, 0x000FFFFFFFFFFFFF); tcg_gen_or_i64(xth, xth, t0); - tcg_gen_shri_i64(exp, xbl, 52); - tcg_gen_andi_i64(exp, exp, 0x7FF); + tcg_gen_extract_i64(exp, xbl, 52, 11); tcg_gen_movi_i64(t0, 0x0010000000000000); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0);