From patchwork Tue May 9 18:07:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 760285 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wMnR90Tkfz9rxl for ; Wed, 10 May 2017 04:08:04 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="LoZZKUK5"; dkim-atps=neutral Received: from localhost ([::1]:38759 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d89YI-00016K-DB for incoming@patchwork.ozlabs.org; Tue, 09 May 2017 14:08:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53891) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d89Xg-00012f-3e for qemu-devel@nongnu.org; Tue, 09 May 2017 14:07:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d89Xe-0002g7-Q2 for qemu-devel@nongnu.org; Tue, 09 May 2017 14:07:24 -0400 Received: from mail-qt0-x241.google.com ([2607:f8b0:400d:c0d::241]:32859) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d89Xe-0002fb-LA for qemu-devel@nongnu.org; Tue, 09 May 2017 14:07:22 -0400 Received: by mail-qt0-x241.google.com with SMTP id a46so1002040qte.0 for ; Tue, 09 May 2017 11:07:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=74Pvf32q5aNdiQFL+uFXMb1/k7BcTev+69cVO5MKEiE=; b=LoZZKUK5CeSBPKZYW6ETVosdr99FyNWR4QxoULjoIOdwGqNNQG+6yq4ouAtAivQEsn lbxQY/orKIssnjbIIzmnUl9kOiJhezp+JSqb+fGMVIFVk8I6gTw+5e566HYjUjd1gyly qAtEzNBzt8HBRyC+sR/C0kcjjnxIUdlSPvEhxxYKDYBjpma9PMasFwhl8ezz0y3gS2YO hL1MAPz/5JQg2Cpc1IEDSVPV15EmiAsR1V7EhEIp147RYjtbnc/xrM6ABmzNZELKYKwH TP/s4WEK+qKYlgpmtUJU+VBY3/zqOVX7dg8gfPQlK2wVq/9DzG4s8uRstOMo7h6IfAME r8GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references; bh=74Pvf32q5aNdiQFL+uFXMb1/k7BcTev+69cVO5MKEiE=; b=DhHGpr8XVEVVb7B1uWQa9mySqi2KjWNJVFSI0gI4HuHnaxVkGL0WQSDPcCFE1aGbgD ChDtwLfKSXlBhwxqsMVHGhruiJi0uN1dPoQQ+Ff6D2ZUIrNNbWOhb/HdEkTEHr9HLZk3 9VLq1VDgTIPDjqLpPlKQ1DeipQ+ZrA43hv4DPdZql0gtb1n4lS+b8MsmpMo7NywEietY AZ4jSXu3i3E7cFWSBXE7k9nuRhAI48uiJaw5/Ei5b7H8qKoqkFcVSfQa7lKS1w24t3Vg +jf59og07sZaWj+dR6t8UrhaACfZ96vKGJH5wm9ik7b9Pmlti2OH4kcxolh2yZNp9GCH QLuA== X-Gm-Message-State: AODbwcAfzVaOaLk/KkGbyqCXWjhNav5TahjK/E/0rMsgPZSl65QMT8cR LjbzlcwpTUxOu+Qnyp0= X-Received: by 10.200.35.110 with SMTP id b43mr1575043qtb.24.1494353241650; Tue, 09 May 2017 11:07:21 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id w12sm213102qtc.20.2017.05.09.11.07.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 May 2017 11:07:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 9 May 2017 11:07:10 -0700 Message-Id: <20170509180715.22910-2-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170509180715.22910-1-rth@twiddle.net> References: <20170509180715.22910-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::241 Subject: [Qemu-devel] [PATCH v3 1/6] target/s390x: Implement STORE FACILITIES LIST EXTENDED X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" At the same time, improve STORE FACILITIES LIST so that we don't hard-code the list for all cpus. Signed-off-by: Richard Henderson Reviewed-by: Aurelien Jarno --- target/s390x/helper.h | 2 ++ target/s390x/insn-data.def | 2 ++ target/s390x/misc_helper.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++ target/s390x/translate.c | 17 ++++++------- 4 files changed, 72 insertions(+), 8 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 9102071..01adb50 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -83,6 +83,8 @@ DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_NO_RWG_SE, i32, env, i32, i64, i64, i64) DEF_HELPER_FLAGS_2(sfpc, TCG_CALL_NO_RWG, void, env, i64) DEF_HELPER_FLAGS_2(sfas, TCG_CALL_NO_WG, void, env, i64) DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env) +DEF_HELPER_2(stfle, i32, env, i64) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 075ff59..b6702da 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -747,6 +747,8 @@ C(0xe33e, STRV, RXY_a, Z, la2, r1_32u, new, m1_32, rev32, 0) C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0) +/* STORE FACILITY LIST EXTENDED */ + C(0xb2b0, STFLE, S, SFLE, 0, a2, 0, 0, stfle, 0) /* STORE FPC */ C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0) diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index eca8244..bd94242 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -678,3 +678,62 @@ void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr) } } #endif + +/* The maximum bit defined at the moment is 129. */ +#define MAX_STFL_WORDS 3 + +/* Canonicalize the current cpu's features into the 64-bit words required + by STFLE. Return the index-1 of the max word that is non-zero. */ +static unsigned do_stfle(CPUS390XState *env, uint64_t words[MAX_STFL_WORDS]) +{ + S390CPU *cpu = s390_env_get_cpu(env); + const unsigned long *features = cpu->model->features; + unsigned max_bit = 0; + S390Feat feat; + + memset(words, 0, sizeof(uint64_t) * MAX_STFL_WORDS); + + if (test_bit(S390_FEAT_ZARCH, features)) { + /* z/Architecture is always active if around */ + words[0] = 1ull << (63 - 2); + } + + for (feat = find_first_bit(features, S390_FEAT_MAX); + feat < S390_FEAT_MAX; + feat = find_next_bit(features, S390_FEAT_MAX, feat + 1)) { + const S390FeatDef *def = s390_feat_def(feat); + if (def->type == S390_FEAT_TYPE_STFL) { + unsigned bit = def->bit; + if (bit > max_bit) { + max_bit = bit; + } + assert(bit / 64 < MAX_STFL_WORDS); + words[bit / 64] |= 1ULL << (63 - bit % 64); + } + } + + return max_bit / 64; +} + +void HELPER(stfl)(CPUS390XState *env) +{ + uint64_t words[MAX_STFL_WORDS]; + + do_stfle(env, words); + cpu_stl_data(env, 200, words[0] >> 32); +} + +uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) +{ + uint64_t words[MAX_STFL_WORDS]; + unsigned count_m1 = env->regs[0] & 0xff; + unsigned max_m1 = do_stfle(env, words); + unsigned i; + + for (i = 0; i <= count_m1; ++i) { + cpu_stq_data(env, addr + 8 * i, words[i]); + } + + env->regs[0] = deposit64(env->regs[0], 0, 8, max_m1); + return (count_m1 >= max_m1 ? 0 : 3); +} diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 01c6217..69940e3 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -3628,15 +3628,8 @@ static ExitStatus op_spt(DisasContext *s, DisasOps *o) static ExitStatus op_stfl(DisasContext *s, DisasOps *o) { - TCGv_i64 f, a; - /* We really ought to have more complete indication of facilities - that we implement. Address this when STFLE is implemented. */ check_privileged(s); - f = tcg_const_i64(0xc0000000); - a = tcg_const_i64(200); - tcg_gen_qemu_st32(f, a, get_mem_index(s)); - tcg_temp_free_i64(f); - tcg_temp_free_i64(a); + gen_helper_stfl(cpu_env); return NO_EXIT; } @@ -3802,6 +3795,14 @@ static ExitStatus op_sturg(DisasContext *s, DisasOps *o) } #endif +static ExitStatus op_stfle(DisasContext *s, DisasOps *o) +{ + potential_page_fault(s); + gen_helper_stfle(cc_op, cpu_env, o->in2); + set_cc_static(s); + return NO_EXIT; +} + static ExitStatus op_st8(DisasContext *s, DisasOps *o) { tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s));