From patchwork Mon May 1 22:10:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 757335 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wGzHf55RBz9sD9 for ; Tue, 2 May 2017 08:14:54 +1000 (AEST) Received: from localhost ([::1]:55933 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5Jam-0001Tt-4m for incoming@patchwork.ozlabs.org; Mon, 01 May 2017 18:14:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45781) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5JX3-0007YB-Kd for qemu-devel@nongnu.org; Mon, 01 May 2017 18:11:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5JX2-0004EJ-Mz for qemu-devel@nongnu.org; Mon, 01 May 2017 18:11:01 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:57308) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5JX2-0004Ak-HI for qemu-devel@nongnu.org; Mon, 01 May 2017 18:11:00 -0400 Received: from [2001:bc8:30d7:120:9bb5:8936:7e6a:9e36] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1d5JWt-00039g-Pt; Tue, 02 May 2017 00:10:51 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.89) (envelope-from ) id 1d5JWs-0002ou-J9; Tue, 02 May 2017 00:10:50 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Tue, 2 May 2017 00:10:35 +0200 Message-Id: <20170501221046.9369-4-aurelien@aurel32.net> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170501221046.9369-1-aurelien@aurel32.net> References: <20170501221046.9369-1-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:bc8:30d7:100::1 Subject: [Qemu-devel] [PATCH 03/14] target/sh4: do not include DELAY_SLOT_TRUE in the TB state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" DELAY_SLOT_TRUE is used as a dynamic condition for the branch after the delay slot instruction. It is not used in code generation, so there is no need to including in the TB state. Signed-off-by: Aurelien Jarno --- target/sh4/cpu.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 9445cc779f..da8d15f1b9 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -382,8 +382,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc, { *pc = env->pc; *cs_base = 0; - *flags = (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL - | DELAY_SLOT_TRUE)) /* Bits 0- 2 */ + *flags = (env->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) /* Bits 0-1 */ | (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR)) /* Bits 19-21 */ | (env->sr & ((1u << SR_MD) | (1u << SR_RB))) /* Bits 29-30 */ | (env->sr & (1u << SR_FD)) /* Bit 15 */