From patchwork Wed Jan 11 02:17:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 713554 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tytNC6m8qz9t0q for ; Wed, 11 Jan 2017 13:37:47 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="g2lF8d2R"; dkim-atps=neutral Received: from localhost ([::1]:50783 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cR8nJ-0008KS-KN for incoming@patchwork.ozlabs.org; Tue, 10 Jan 2017 21:37:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35011) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cR8Ui-00061T-8M for qemu-devel@nongnu.org; Tue, 10 Jan 2017 21:18:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cR8Ug-00036V-To for qemu-devel@nongnu.org; Tue, 10 Jan 2017 21:18:32 -0500 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:35015) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cR8Ug-000363-OI for qemu-devel@nongnu.org; Tue, 10 Jan 2017 21:18:30 -0500 Received: by mail-pf0-x241.google.com with SMTP id f144so12524392pfa.2 for ; Tue, 10 Jan 2017 18:18:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=CAIjUjxD2Q8qZ7gZRFB6Rcz7DbL/uv7ZrPZyjHP1N1s=; b=g2lF8d2RKV67AeAxxixctCcPuUfoYt6AJ+tazRcXWQcRu2ozFnrrSSUlL25rebgX8m DFf0EP/qcgd+0vLApLZuhyhAM0V+IK1PH95mm/08o8QpyS9FcdUJwczLQYUCtQ8Lznim FI8L9DgY9jMPV46zRyQvjkeXqtatMkKZHFmEYAZGQ772phkbHgck1u2L41YoidkP80cL zXsxPOgl0jTx6HEQSZMKprX7lQrhdpx5ugEsu1tW5mWmPypBKO7exgyLU4gkGBTqV6uf kf2FbFk6bK+dl4vgrdScS486bnkLIQUSyxdOZpJ0YscoLHpBCgN+g8JY0uWXz5ATvU4E 2GLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=CAIjUjxD2Q8qZ7gZRFB6Rcz7DbL/uv7ZrPZyjHP1N1s=; b=HiV/vaXgchsdL0fEAiqsaMHAkQGdFR3knRSxF/dv7wuXCHqiM7/5yRuIGil7EkWpYV R81M1zDXnrWQKshCi8nsoSpH4JkGSPbbFRkl7xgbHqN404GsABhu67qvgZe4G5+A/ZCZ eF3b45p4E+qvGSDt8cUdhgd63Zbr60iHZ4aubdwEfGXef4BK/bW6JBMi9aQmvp+F9/ju ZVx02v7G+Es93neBi31/3cq51G5SxPokuKdwDS7G8HJGjtkdigmfIGQ/WYgL7cV+mfKw R25IqeQtftKgH/3Yi9UrKBrgwSvHgB0xGJKs5ZlVO/Ly8DLJsGEQWePokPgHDdlAiQMQ KV1A== X-Gm-Message-State: AIkVDXJuFy7lH5BVJGi5xXFi8hacMUF364Qr8THM92MT5d+6oiOrEKvrLGaQCeMq9LIMAw== X-Received: by 10.98.150.206 with SMTP id s75mr7546989pfk.155.1484101109693; Tue, 10 Jan 2017 18:18:29 -0800 (PST) Received: from bigtime.domain ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id a68sm8733460pgc.31.2017.01.10.18.18.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 10 Jan 2017 18:18:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 10 Jan 2017 18:17:24 -0800 Message-Id: <20170111021820.24416-10-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170111021820.24416-1-rth@twiddle.net> References: <20170111021820.24416-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PULL 09/65] tcg/ppc: Implement field extraction opcodes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: David Gibson Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.h | 4 ++-- tcg/ppc/tcg-target.inc.c | 10 ++++++++++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index c765d3e..b42c57a 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -69,7 +69,7 @@ typedef enum { #define TCG_TARGET_HAS_nand_i32 1 #define TCG_TARGET_HAS_nor_i32 1 #define TCG_TARGET_HAS_deposit_i32 1 -#define TCG_TARGET_HAS_extract_i32 0 +#define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_mulu2_i32 0 @@ -102,7 +102,7 @@ typedef enum { #define TCG_TARGET_HAS_nand_i64 1 #define TCG_TARGET_HAS_nor_i64 1 #define TCG_TARGET_HAS_deposit_i64 1 -#define TCG_TARGET_HAS_extract_i64 0 +#define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index a3262cf..7ec54a2 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -2396,6 +2396,14 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, } break; + case INDEX_op_extract_i32: + tcg_out_rlw(s, RLWINM, args[0], args[1], + 32 - args[2], 32 - args[3], 31); + break; + case INDEX_op_extract_i64: + tcg_out_rld(s, RLDICL, args[0], args[1], 64 - args[2], 64 - args[3]); + break; + case INDEX_op_movcond_i32: tcg_out_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], args[2], args[3], args[4], const_args[2]); @@ -2530,6 +2538,7 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_movcond_i32, { "r", "r", "ri", "rZ", "rZ" } }, { INDEX_op_deposit_i32, { "r", "0", "rZ" } }, + { INDEX_op_extract_i32, { "r", "r" } }, { INDEX_op_muluh_i32, { "r", "r", "r" } }, { INDEX_op_mulsh_i32, { "r", "r", "r" } }, @@ -2585,6 +2594,7 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_movcond_i64, { "r", "r", "ri", "rZ", "rZ" } }, { INDEX_op_deposit_i64, { "r", "0", "rZ" } }, + { INDEX_op_extract_i64, { "r", "r" } }, { INDEX_op_mulsh_i64, { "r", "r", "r" } }, { INDEX_op_muluh_i64, { "r", "r", "r" } },