From patchwork Sat Dec 24 04:00:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 708582 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tlscZ4T5nz9srZ for ; Sat, 24 Dec 2016 15:25:18 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="gesrDCIf"; dkim-atps=neutral Received: from localhost ([::1]:41986 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cKdtU-0002hv-Dd for incoming@patchwork.ozlabs.org; Fri, 23 Dec 2016 23:25:16 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55578) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cKdWG-0006sP-U4 for qemu-devel@nongnu.org; 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} -uint32_t HELPER(nsa)(uint32_t v) -{ - if (v & 0x80000000) { - v = ~v; - } - return v ? clz32(v) - 1 : 31; -} - -uint32_t HELPER(nsau)(uint32_t v) -{ - return v ? clz32(v) : 32; -} - static void copy_window_from_phys(CPUXtensaState *env, uint32_t window, uint32_t phys, uint32_t n) { diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 0858c29..5c719a4 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1372,14 +1372,23 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) case 14: /*NSAu*/ HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA); if (gen_window_check2(dc, RRR_S, RRR_T)) { - gen_helper_nsa(cpu_R[RRR_T], cpu_R[RRR_S]); + TCGv_i32 t0 = tcg_temp_new_i32(); + + /* if (v & 0x80000000) v = ~v; */ + tcg_gen_sari_i32(t0, cpu_R[RRR_S], 31); + tcg_gen_xor_i32(t0, t0, cpu_R[RRR_S]); + + /* r = (v ? clz(v) : 32) - 1; */ + tcg_gen_clzi_i32(t0, t0, 32); + tcg_gen_subi_i32(cpu_R[RRR_T], t0, 1); + tcg_temp_free_i32(t0); } break; case 15: /*NSAUu*/ HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA); if (gen_window_check2(dc, RRR_S, RRR_T)) { - gen_helper_nsau(cpu_R[RRR_T], cpu_R[RRR_S]); + tcg_gen_clzi_i32(cpu_R[RRR_T], cpu_R[RRR_S], 32); } break;