From patchwork Wed Dec 7 18:07:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 703697 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tYmkZ64LVz9t14 for ; Thu, 8 Dec 2016 05:10:30 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="CPzNzHE7"; dkim-atps=neutral Received: from localhost ([::1]:40687 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cEgfd-00041k-7X for incoming@patchwork.ozlabs.org; Wed, 07 Dec 2016 13:10:21 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49012) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cEgeJ-00036H-Ho for qemu-devel@nongnu.org; Wed, 07 Dec 2016 13:09:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cEgeG-0005Sr-C7 for qemu-devel@nongnu.org; Wed, 07 Dec 2016 13:08:59 -0500 Received: from mail-qt0-f196.google.com ([209.85.216.196]:35480) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cEgeG-0005MP-6j for qemu-devel@nongnu.org; Wed, 07 Dec 2016 13:08:56 -0500 Received: by mail-qt0-f196.google.com with SMTP id m48so45630294qta.2 for ; Wed, 07 Dec 2016 10:08:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=ovTJLUG4z8mxobDljk0FvRQXjZkMIbBn+LOMIQ3VtQ4=; b=CPzNzHE7w35V2zmgE973d5xNq6TJHgENKrnvKXQmuetGP7vpXIqu5vqyK+AJCO9F5K KJyHYbvuKHVNQS9OyrheOUGjEweYKAXQnjm8OaV48fnPldmdNNeOqRhD16we3XRD3U6Z E4BMp4lDwZW5v2dm35XQSn+SdaPvL/tW3/lJWWV4nsbpqQyuCt7b7Siz6M+91jqqZTmq LdPbzSSHQDCF11PyyRZavcPezMKLqqfDIsqjcCUIMC5dLTpa0pIjhUNf6RbjdrlVeOC6 RmtTZRSSH9RkXeIDXoVjQHEu8vq1gulAsjVCJ4j2thbrVYRARs28hobsD348FXI7x3xm wV0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=ovTJLUG4z8mxobDljk0FvRQXjZkMIbBn+LOMIQ3VtQ4=; b=SpysKCKzVIH4YQLQ0opYjJpWSCb+6REYHMOK4TG5W6dERF0Fy9wGxpIm/HqVs9JPSH 1NqBkaT2SXMHwdJgWDWAz79vQxOdsMNcic8+wHbYlZBqEjt+ZV6U4GKxpVyvWYIe0p31 6brmXRs6i8uFCIPaW/Fu/tCKK8FF5+WoP13IAitPDYTEHL34wAzB+0rs+U1eZZ/wcYRv l1iRHZxgcfIgw9JmxrAAKgxGhxEBYD96M/lB7RHysP7SH5U73hIyRFKvMug3+6w/pyUx brwQ+/zrmxbksn/ET8Jvopxpaqr5hl1pjKnJJBXa2oipvF9IJkUwm5bdn8KMShHYKIob v85w== X-Gm-Message-State: AKaTC00LEXs5RErsm5+sQH2Zb0LEUc2GZrY331ZEJqiLy0cFu8TaxiGnfMIjyJkk8ZBrzA== X-Received: by 10.200.42.19 with SMTP id k19mr59850832qtk.236.1481134054336; Wed, 07 Dec 2016 10:07:34 -0800 (PST) Received: from anchor.twiddle.net.com ([2602:47:d954:1500:221:9bff:feff:8add]) by smtp.gmail.com with ESMTPSA id p28sm15334547qtb.31.2016.12.07.10.07.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Dec 2016 10:07:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 7 Dec 2016 10:07:26 -0800 Message-Id: <20161207180727.6286-2-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161207180727.6286-1-rth@twiddle.net> References: <20161207180727.6286-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.216.196 Subject: [Qemu-devel] [PATCH 1/2] tcg/aarch64: Fix addsub2 for 0+C X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" When al == xzr, we cannot use addi/subi because that encodes xsp. Force a zero into the temp register for that (rare) case. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.inc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 1939d35..6c68681 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -965,6 +965,15 @@ static inline void tcg_out_addsub2(TCGContext *s, int ext, TCGReg rl, insn = I3401_SUBSI; bl = -bl; } + if (unlikely(al == TCG_REG_XZR)) { + /* ??? We want to allow al to be zero for the benefit of + negation via subtraction. However, that leaves open the + possibility of adding 0+const in the low part, and the + immediate add instructions encode XSP not XZR. Don't try + anything more elaborate here than loading another zero. */ + al = TCG_REG_TMP; + tcg_out_movi(s, ext, al, 0); + } tcg_out_insn_3401(s, insn, ext, rl, al, bl); } else { tcg_out_insn_3502(s, sub ? I3502_SUBS : I3502_ADDS, ext, rl, al, bl);