From patchwork Mon May 9 17:15:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= X-Patchwork-Id: 619983 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3r3TYW2vlTz9t42 for ; Tue, 10 May 2016 03:15:59 +1000 (AEST) Received: from localhost ([::1]:42406 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1azomj-0004vf-6k for incoming@patchwork.ozlabs.org; Mon, 09 May 2016 13:15:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34128) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1azomO-0004Ob-Ha for qemu-devel@nongnu.org; Mon, 09 May 2016 13:15:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1azomK-0004ok-6M for qemu-devel@nongnu.org; Mon, 09 May 2016 13:15:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60923) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1azomJ-0004oS-U3 for qemu-devel@nongnu.org; Mon, 09 May 2016 13:15:32 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1E82421484; Mon, 9 May 2016 17:15:31 +0000 (UTC) Received: from potion (dhcp-1-215.brq.redhat.com [10.34.1.215]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with SMTP id u49HFQUn007511; Mon, 9 May 2016 13:15:26 -0400 Received: by potion (sSMTP sendmail emulation); Mon, 09 May 2016 19:15:26 +0200 Date: Mon, 9 May 2016 19:15:26 +0200 From: Radim =?utf-8?B?S3LEjW3DocWZ?= To: Peter Xu Message-ID: <20160509171525.GA9224@potion> References: <1462418761-12714-1-git-send-email-peterx@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1462418761-12714-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 09 May 2016 17:15:31 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-devel] [PATCH v6 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, qemu-devel@nongnu.org, alex.williamson@redhat.com, jan.kiszka@web.de, wexu@redhat.com, imammedo@redhat.com, marcel@redhat.com, pbonzini@redhat.com, davidkiarie4@gmail.com, rth@twiddle.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" 2016-05-05 11:25+0800, Peter Xu: > Hi, all, > > This is v6 for Intel IOMMU IR support. This series introduced quite > a few new patches based on v5. Sorry for that (Yes, Jan is > contributing to it as well, though most of which are really good > ideas for me :). Hopefully we can get its convergence in this > version. > > To make the review easier, I tried to keep all the existing patches > and indexes (also, this is easier for me too to do the > modifications, and logically I feel this make more sense and clean, > please let me know if I am wrong). Patches 1-18 are v5 patches, and > patches 19-26 are newly added patches. > > All the new patches may need more review, many of them are outside > Intel IOMMU scope, and touching other part of codes, which I am > still not very sure about. > > Testing is only covering basic smoke test for the following matrix: > > - IR enabled/disable > - kernel irqchip off/split > - network device: tap with/without vhost, e1000 I noticed a bug with RHEL7 linux guest, 3.10.0-390.el7.x86_64. Kernel complains about queued invalidation and fails to boot: virtio-pci 0000:00:01.0: virtio_pci: leaving for legacy driver DMAR-IR: Requested mask 1 exceeds the max invalidation handle mask value 0 DMAR-IR: Unable to allocate 2 IRTE for PCI 0000:00:01.0 DMAR-IR: Requested mask 1 exceeds the max invalidation handle mask value 0 DMAR-IR: Unable to allocate 2 IRTE for PCI 0000:00:01.0 dracut-initqueue[263]: Warning: dracut-initqueue timeout - starting timeout scripts dracut-initqueue[263]: Warning: Could not boot. dracut-initqueue[263]: Warning: /dev/mapper/rhel-root does not exist dracut-initqueue[263]: Warning: /dev/rhel/root does not exist dracut-initqueue[263]: Warning: /dev/rhel/swap does not exist The patch below helps, ---8<--- From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= Date: Mon, 9 May 2016 19:04:56 +0200 Subject: [PATCH] intel_iommu: support all masks in interrupt entry cache invalidation Linux guests do not gracefully handle cases when the invalidation mask they wanted is not supported, probably because real hardware always allowed all. We can just say that all 16 masks are supported, because both ioapic_iec_notifier and kvm_update_msi_routes_all invalidate all caches. Signed-off-by: Radim Krčmář --- hw/i386/intel_iommu.c | 2 +- hw/i386/intel_iommu_internal.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index d10064289551..be3647f6b006 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2359,7 +2359,7 @@ static void vtd_init(IntelIOMMUState *s) s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO; if (ms->iommu_intr) { - s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM; + s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHVM; } vtd_reset_context_cache(s); diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 72b011492755..0829a5064f2c 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -186,6 +186,7 @@ /* Interrupt Remapping support */ #define VTD_ECAP_IR (1ULL << 3) #define VTD_ECAP_EIM (1ULL << 4) +#define VTD_ECAP_MHMV (15ULL << 20) /* CAP_REG */ /* (offset >> 4) << 24 */