From patchwork Wed Dec 16 06:08:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aravinda Prasad X-Patchwork-Id: 557320 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 06F0A1402C4 for ; Wed, 16 Dec 2015 17:10:00 +1100 (AEDT) Received: from localhost ([::1]:45598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a95Hh-0004NL-LX for incoming@patchwork.ozlabs.org; Wed, 16 Dec 2015 01:09:57 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40223) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a95GU-00024B-V1 for qemu-devel@nongnu.org; Wed, 16 Dec 2015 01:08:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a95GS-00067M-5C for qemu-devel@nongnu.org; Wed, 16 Dec 2015 01:08:42 -0500 Received: from e19.ny.us.ibm.com ([129.33.205.209]:51821) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a95GS-00067F-1L for qemu-devel@nongnu.org; Wed, 16 Dec 2015 01:08:40 -0500 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 16 Dec 2015 01:08:38 -0500 X-IBM-Helo: d01dlp03.pok.ibm.com X-IBM-MailFrom: aravinda@linux.vnet.ibm.com X-IBM-RcptTo: qemu-devel@nongnu.org;qemu-ppc@nongnu.org Received: from b01cxnp22035.gho.pok.ibm.com (b01cxnp22035.gho.pok.ibm.com [9.57.198.25]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id D14CBC9003C; Wed, 16 Dec 2015 00:56:46 -0500 (EST) Received: from d01av05.pok.ibm.com (d01av05.pok.ibm.com [9.56.224.195]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id tBG68b2j27459632; Wed, 16 Dec 2015 06:08:37 GMT Received: from d01av05.pok.ibm.com (localhost [127.0.0.1]) by d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id tBG65QvP022080; Wed, 16 Dec 2015 01:05:30 -0500 Received: from [127.0.1.1] (aravindap.in.ibm.com [9.124.35.182]) by d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id tBG65Gkv021689; Wed, 16 Dec 2015 01:05:18 -0500 To: qemu-ppc@nongnu.org, agraf@suse.de, qemu-devel@nongnu.org From: Aravinda Prasad Date: Wed, 16 Dec 2015 11:38:22 +0530 Message-ID: <20151216060822.10636.95431.stgit@aravindap> In-Reply-To: <20151216060551.10636.77403.stgit@aravindap> References: <20151216060551.10636.77403.stgit@aravindap> User-Agent: StGit/0.15 MIME-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15121606-0057-0000-0000-000002DED510 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 129.33.205.209 Cc: benh@au1.ibm.com, aik@ozlabs.ru, paulus@samba.org, sam.bobroff@au1.ibm.com, david@gibson.dropbear.id.au Subject: [Qemu-devel] [PATCH v2 2/4] spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds support in QEMU to handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls. The machine check notification address is saved when the OS issues "ibm,nmi-register" RTAS call. This patch also handles the case when multiple processors experience machine check at or about the same time by handling "ibm,nmi-interlock" call. In such cases, as per PAPR, subsequent processors serialize waiting for the first processor to issue the "ibm,nmi-interlock" call. The second processor waits till the first processor, which also received a machine check error, is done reading the error log. The first processor issues "ibm,nmi-interlock" call when the error log is consumed. This patch implements the releasing part of the error-log while subsequent patch (which builds error log) handles the locking part. Signed-off-by: Aravinda Prasad --- hw/ppc/spapr_rtas.c | 36 ++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 10 +++++++++- 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 9869bc9..17c4672 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -597,6 +597,38 @@ out: rtas_st(rets, 0, rc); } +static void rtas_ibm_nmi_register(PowerPCCPU *cpu, + sPAPRMachineState *spapr, + uint32_t token, uint32_t nargs, + target_ulong args, + uint32_t nret, target_ulong rets) +{ + spapr->mc_in_progress = false; + qemu_cond_init(&spapr->mc_delivery_cond); + spapr->guest_machine_check_addr = rtas_ld(args, 1); + rtas_st(rets, 0, RTAS_OUT_SUCCESS); +} + +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, + sPAPRMachineState *spapr, + uint32_t token, uint32_t nargs, + target_ulong args, + uint32_t nret, target_ulong rets) +{ + if (!spapr->guest_machine_check_addr) { + /* NMI register not called */ + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + } else { + /* + * VCPU issuing "ibm,nmi-interlock" is done with NMI handling, + * hence unset mc_in_progress. + */ + spapr->mc_in_progress = false; + qemu_cond_signal(&spapr->mc_delivery_cond); + rtas_st(rets, 0, RTAS_OUT_SUCCESS); + } +} + static struct rtas_call { const char *name; spapr_rtas_fn fn; @@ -747,6 +779,10 @@ static void core_rtas_register_types(void) rtas_get_sensor_state); spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector", rtas_ibm_configure_connector); + spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register", + rtas_ibm_nmi_register); + spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock", + rtas_ibm_nmi_interlock); } type_init(core_rtas_register_types) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index b5cadd7..de84a4e 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -74,6 +74,12 @@ struct sPAPRMachineState { /* RTAS state */ QTAILQ_HEAD(, sPAPRConfigureConnectorState) ccs_list; + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */ + target_ulong guest_machine_check_addr; + bool mc_in_progress; + int mc_cpu; + QemuCond mc_delivery_cond; + /*< public >*/ char *kvm_type; }; @@ -458,8 +464,10 @@ int spapr_allocate_irq_block(int num, bool lsi, bool msi); #define RTAS_IBM_SET_SLOT_RESET (RTAS_TOKEN_BASE + 0x23) #define RTAS_IBM_CONFIGURE_PE (RTAS_TOKEN_BASE + 0x24) #define RTAS_IBM_SLOT_ERROR_DETAIL (RTAS_TOKEN_BASE + 0x25) +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x26) +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x27) -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x26) +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x28) /* RTAS ibm,get-system-parameter token values */ #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20