@@ -186,6 +186,13 @@ e1000_link_up(E1000State *s)
s->phy_reg[PHY_STATUS] |= MII_SR_LINK_STATUS;
}
+static bool
+have_autoneg(E1000State *s)
+{
+ return (s->compat_flags & E1000_FLAG_AUTONEG) &&
+ (s->phy_reg[PHY_CTRL] & MII_CR_AUTO_NEG_EN);
+}
+
static void
set_phy_ctrl(E1000State *s, int index, uint16_t val)
{
@@ -194,13 +201,16 @@ set_phy_ctrl(E1000State *s, int index, uint16_t val)
* migrate during auto negotiation, after migration the link will be
* down.
*/
- if (!(s->compat_flags & E1000_FLAG_AUTONEG)) {
- return;
- }
- if ((val & MII_CR_AUTO_NEG_EN) && (val & MII_CR_RESTART_AUTO_NEG)) {
+
+ /* bits 0-5 reserved; MII_CR_[RESTART_AUTO_NEG,RESET] are self clearing */
+ s->phy_reg[PHY_CTRL] = val &
+ ~(0x3f | MII_CR_RESTART_AUTO_NEG | MII_CR_RESET);
+
+ if (have_autoneg(s) && (val & MII_CR_RESTART_AUTO_NEG)) {
e1000_link_down(s);
DBGOUT(PHY, "Start link auto negotiation\n");
- timer_mod(s->autoneg_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 500);
+ timer_mod(s->autoneg_timer,
+ qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 500);
}
}
@@ -446,8 +456,9 @@ set_mdic(E1000State *s, int index, uint32_t val)
} else {
if (addr < NPHYWRITEOPS && phyreg_writeops[addr]) {
phyreg_writeops[addr](s, index, data);
+ } else {
+ s->phy_reg[addr] = data;
}
- s->phy_reg[addr] = data;
}
}
s->mac_reg[MDIC] = val | E1000_MDIC_READY;
@@ -848,14 +859,6 @@ receive_filter(E1000State *s, const uint8_t *buf, int size)
return 0;
}
-static bool
-have_autoneg(E1000State *s)
-{
- return (s->compat_flags & E1000_FLAG_AUTONEG) &&
- (s->phy_reg[PHY_CTRL] & MII_CR_AUTO_NEG_EN) &&
- (s->phy_reg[PHY_CTRL] & MII_CR_RESTART_AUTO_NEG);
-}
-
static void
e1000_set_link_status(NetClientState *nc)
{
Make phyreg_writeops responsible for actually writing their respective phy registers. The only current instance of phyreg_writeops is the set_phy_ctrl() function, which we modify to actually write the register, while also correctly handling reserved and self-clearing bits. have_autoneg() does not need to check for MII_CR_RESTART_AUTO_NEG, since the only time the flag comes into play is during set_phy_ctrl(), and never actually gets written to the phy control register. We also move it in front of set_phy_ctrl(), to avoid a forward declaration. Signed-off-by: Gabriel Somlo <somlo@cmu.edu> --- No longer an RFC, since I now think I understand what I'm doing, and believe it's "The Right Thing (TM)" :) Uncoupling it from the timer delay value patch, since they're orthogonal, and we should talk about that independently... Thanks much, Gabriel hw/net/e1000.c | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-)