From patchwork Thu May 29 12:23:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 353750 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id EADC8140099 for ; Thu, 29 May 2014 22:28:22 +1000 (EST) Received: from localhost ([::1]:47805 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpzRU-0005tp-TS for incoming@patchwork.ozlabs.org; Thu, 29 May 2014 08:28:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36557) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpzNt-0007pP-NY for qemu-devel@nongnu.org; Thu, 29 May 2014 08:24:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WpzNm-00060w-Gd for qemu-devel@nongnu.org; Thu, 29 May 2014 08:24:37 -0400 Received: from roura.ac.upc.edu ([147.83.33.10]:55526 helo=roura.ac.upc.es) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpzNW-0005tM-V6; Thu, 29 May 2014 08:24:15 -0400 Received: from gw-2.ac.upc.es (gw-2.ac.upc.es [147.83.30.8]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id s4TCNVIP022951; Thu, 29 May 2014 14:23:32 +0200 Received: from localhost (unknown [84.88.51.85]) by gw-2.ac.upc.es (Postfix) with ESMTPSA id A3E39164; Thu, 29 May 2014 14:23:31 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Thu, 29 May 2014 14:23:31 +0200 Message-Id: <20140529122330.9724.72706.stgit@fimbulvetr.bsc.es> X-Mailer: git-send-email 2.0.0.rc2 In-Reply-To: <20140529122231.9724.83450.stgit@fimbulvetr.bsc.es> References: <20140529122231.9724.83450.stgit@fimbulvetr.bsc.es> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id s4TCNVIP022951 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 147.83.33.10 Cc: Peter Maydell , Jia Liu , Alexander Graf , Blue Swirl , Max Filippov , Michael Walle , "open list:PowerPC" , Stefan Hajnoczi , "Edgar E. Iglesias" , Guan Xuetao , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH v4 10/10] trace: [tcg] Include TCG-tracing header on all targets X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Lluís Vilanova --- target-alpha/translate.c | 3 +++ target-arm/translate-a64.c | 2 ++ target-arm/translate.c | 3 +++ target-cris/translate.c | 3 +++ target-i386/translate.c | 3 +++ target-lm32/translate.c | 3 +++ target-m68k/translate.c | 3 +++ target-microblaze/translate.c | 3 +++ target-mips/translate.c | 3 +++ target-openrisc/translate.c | 3 +++ target-ppc/translate.c | 3 +++ target-s390x/translate.c | 2 ++ target-sh4/translate.c | 3 +++ target-sparc/translate.c | 3 +++ target-unicore32/translate.c | 3 +++ target-xtensa/translate.c | 3 +++ 16 files changed, 46 insertions(+) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index e31d56c..9e2a773 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -25,6 +25,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #undef ALPHA_DEBUG_DISAS #define CONFIG_SOFTFLOAT_INLINE diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 9f964df..505c812 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -34,6 +34,8 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + static TCGv_i64 cpu_X[32]; static TCGv_i64 cpu_pc; static TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF; diff --git a/target-arm/translate.c b/target-arm/translate.c index 7f6fcd6..1a5a838 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -34,6 +34,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define ENABLE_ARCH_4T arm_feature(env, ARM_FEATURE_V4T) #define ENABLE_ARCH_5 arm_feature(env, ARM_FEATURE_V5) /* currently all emulated v5 cores are also v5TE, so don't bother */ diff --git a/target-cris/translate.c b/target-cris/translate.c index 90fe0a2..a4027f0 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -32,6 +32,9 @@ #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define DISAS_CRIS 0 #if DISAS_CRIS # define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) diff --git a/target-i386/translate.c b/target-i386/translate.c index 3aa52eb..60a2954 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -31,6 +31,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define PREFIX_REPZ 0x01 #define PREFIX_REPNZ 0x02 #define PREFIX_LOCK 0x04 diff --git a/target-lm32/translate.c b/target-lm32/translate.c index 51eca06..d88c44b 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -26,6 +26,9 @@ #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define DISAS_LM32 1 #if DISAS_LM32 # define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index fa248d9..d6c39e3 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -26,6 +26,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + //#define DEBUG_DISPATCH 1 /* Fake floating point. */ diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 488df2d..373b09a 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -25,6 +25,9 @@ #include "microblaze-decode.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define SIM_COMPAT 0 #define DISAS_GNU 1 #define DISAS_MB 1 diff --git a/target-mips/translate.c b/target-mips/translate.c index 13cf29b..3930e7f 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -28,6 +28,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define MIPS_DEBUG_DISAS 0 //#define MIPS_DEBUG_SIGN_EXTENSIONS diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 40084f9..2143328 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -30,6 +30,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define OPENRISC_DISAS #ifdef OPENRISC_DISAS diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 6283b2c..e292387 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -26,6 +26,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define CPU_SINGLE_STEP 0x1 #define CPU_BRANCH_STEP 0x2 #define GDBSTUB_SINGLE_STEP 0x4 diff --git a/target-s390x/translate.c b/target-s390x/translate.c index cf65f01..60ea3b1 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -41,6 +41,8 @@ static TCGv_ptr cpu_env; #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + /* Information that (most) every instruction needs to manipulate. */ typedef struct DisasContext DisasContext; diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 169c87f..00f2eca 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -27,6 +27,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + typedef struct DisasContext { struct TranslationBlock *tb; target_ulong pc; diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 652a181..966cc89 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -31,6 +31,9 @@ #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define DEBUG_DISAS #define DYNAMIC_PC 1 /* dynamic pc value */ diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index 3cccafe..1b04a6c 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -22,6 +22,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + /* internal defines */ typedef struct DisasContext { target_ulong pc; diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 57e56bd..14d3bc2 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -40,6 +40,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + typedef struct DisasContext { const XtensaConfig *config; TranslationBlock *tb;