@@ -201,31 +201,31 @@ DefinitionBlock (
#define prt_slot_lnkH(nr) prt_slot_lnk(nr, LNKH, LNKE, LNKF, LNKG)
Name(PRTP, package() {
- prt_slot_lnkE(0x0000),
- prt_slot_lnkF(0x0001),
- prt_slot_lnkG(0x0002),
- prt_slot_lnkH(0x0003),
- prt_slot_lnkE(0x0004),
- prt_slot_lnkF(0x0005),
- prt_slot_lnkG(0x0006),
- prt_slot_lnkH(0x0007),
- prt_slot_lnkE(0x0008),
- prt_slot_lnkF(0x0009),
- prt_slot_lnkG(0x000a),
- prt_slot_lnkH(0x000b),
- prt_slot_lnkE(0x000c),
- prt_slot_lnkF(0x000d),
- prt_slot_lnkG(0x000e),
- prt_slot_lnkH(0x000f),
- prt_slot_lnkE(0x0010),
- prt_slot_lnkF(0x0011),
- prt_slot_lnkG(0x0012),
- prt_slot_lnkH(0x0013),
- prt_slot_lnkE(0x0014),
- prt_slot_lnkF(0x0015),
- prt_slot_lnkG(0x0016),
- prt_slot_lnkH(0x0017),
- prt_slot_lnkE(0x0018),
+ prt_slot_lnkH(0x0000),
+ prt_slot_lnkE(0x0001),
+ prt_slot_lnkF(0x0002),
+ prt_slot_lnkG(0x0003),
+ prt_slot_lnkH(0x0004),
+ prt_slot_lnkE(0x0005),
+ prt_slot_lnkF(0x0006),
+ prt_slot_lnkG(0x0007),
+ prt_slot_lnkH(0x0008),
+ prt_slot_lnkE(0x0009),
+ prt_slot_lnkF(0x000a),
+ prt_slot_lnkG(0x000b),
+ prt_slot_lnkH(0x000c),
+ prt_slot_lnkE(0x000d),
+ prt_slot_lnkF(0x000e),
+ prt_slot_lnkG(0x000f),
+ prt_slot_lnkH(0x0010),
+ prt_slot_lnkE(0x0011),
+ prt_slot_lnkF(0x0012),
+ prt_slot_lnkG(0x0013),
+ prt_slot_lnkH(0x0014),
+ prt_slot_lnkE(0x0015),
+ prt_slot_lnkF(0x0016),
+ prt_slot_lnkG(0x0017),
+ prt_slot_lnkH(0x0018),
/* INTA -> PIRQA for slot 25 - 31
see the default value of D<N>IR */
@@ -258,31 +258,31 @@ DefinitionBlock (
#define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG)
Name(PRTA, package() {
- prt_slot_gsiE(0x0000),
- prt_slot_gsiF(0x0001),
- prt_slot_gsiG(0x0002),
- prt_slot_gsiH(0x0003),
- prt_slot_gsiE(0x0004),
- prt_slot_gsiF(0x0005),
- prt_slot_gsiG(0x0006),
- prt_slot_gsiH(0x0007),
- prt_slot_gsiE(0x0008),
- prt_slot_gsiF(0x0009),
- prt_slot_gsiG(0x000a),
- prt_slot_gsiH(0x000b),
- prt_slot_gsiE(0x000c),
- prt_slot_gsiF(0x000d),
- prt_slot_gsiG(0x000e),
- prt_slot_gsiH(0x000f),
- prt_slot_gsiE(0x0010),
- prt_slot_gsiF(0x0011),
- prt_slot_gsiG(0x0012),
- prt_slot_gsiH(0x0013),
- prt_slot_gsiE(0x0014),
- prt_slot_gsiF(0x0015),
- prt_slot_gsiG(0x0016),
- prt_slot_gsiH(0x0017),
- prt_slot_gsiE(0x0018),
+ prt_slot_gsiH(0x0000),
+ prt_slot_gsiE(0x0001),
+ prt_slot_gsiF(0x0002),
+ prt_slot_gsiG(0x0003),
+ prt_slot_gsiH(0x0004),
+ prt_slot_gsiE(0x0005),
+ prt_slot_gsiF(0x0006),
+ prt_slot_gsiG(0x0007),
+ prt_slot_gsiH(0x0008),
+ prt_slot_gsiE(0x0009),
+ prt_slot_gsiF(0x000a),
+ prt_slot_gsiG(0x000b),
+ prt_slot_gsiH(0x000c),
+ prt_slot_gsiE(0x000d),
+ prt_slot_gsiF(0x000e),
+ prt_slot_gsiG(0x000f),
+ prt_slot_gsiH(0x0010),
+ prt_slot_gsiE(0x0011),
+ prt_slot_gsiF(0x0012),
+ prt_slot_gsiG(0x0013),
+ prt_slot_gsiH(0x0014),
+ prt_slot_gsiE(0x0015),
+ prt_slot_gsiF(0x0016),
+ prt_slot_gsiG(0x0017),
+ prt_slot_gsiH(0x0018),
/* INTA -> PIRQA for slot 25 - 31, but 30
see the default value of D<N>IR */
When seabios programs PCI interrupt line registers it expects a specific slot:pin to PIRQ mapping (see pci_slot_get_irq). If we want to re-use this function between both PIIX and ICH9, then the _PRT exposed to the guest needs to change. NB. slots 25-31 on ICH9 don't follow this routing pattern and can be changed independently, so even with this boot ROMs behind express ports may not work correctly with interrupts. We can possibly make them follow this pattern or come up with a new mch_pci_slot_get_irq() function, in which case we don't need to match PIIX. PIIX slot:pin array - D/A/B/C, A/B/C/D, B/C/D/A, C/D/A/B Current ICH9 - E/F/G/H, F/G/H/E, G/H/E/F, H/E/F/G Revised ICH9 - H/E/F/G, E/F/G/H, F/G/H/E, G/H/E/F Signed-off-by: Alex Williamson <alex.williamson@redhat.com> --- src/q35-acpi-dsdt.dsl | 100 +++++++++++++++++++++++++------------------------ 1 file changed, 50 insertions(+), 50 deletions(-)