From patchwork Wed Sep 12 05:57:06 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 183250 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2C6302C0087 for ; Wed, 12 Sep 2012 15:57:03 +1000 (EST) Received: from localhost ([::1]:37084 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TBfwb-0000La-1q for incoming@patchwork.ozlabs.org; Wed, 12 Sep 2012 01:57:01 -0400 Received: from eggs.gnu.org ([208.118.235.92]:48443) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TBfwT-0000L8-73 for qemu-devel@nongnu.org; Wed, 12 Sep 2012 01:56:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TBfwR-0003Iu-J7 for qemu-devel@nongnu.org; Wed, 12 Sep 2012 01:56:53 -0400 Received: from e23smtp07.au.ibm.com ([202.81.31.140]:53305) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TBfwR-0003Id-0E for qemu-devel@nongnu.org; Wed, 12 Sep 2012 01:56:51 -0400 Received: from /spool/local by e23smtp07.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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X-Received-From: 202.81.31.140 Cc: aliguori@us.ibm.com, qemu-devel@nongnu.org Subject: Re: [Qemu-devel] [PATCH 2/2] cpu_physical_memory_write_rom() needs to do TB invalidates X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Mon, Sep 10, 2012 at 03:27:45PM +0200, Andreas Färber wrote: > Am 10.09.2012 04:30, schrieb David Gibson: > > cpu_physical_memory_write_rom(), despite the name, can also be used to > > write images into RAM - and will often be used that way if the machine > > uses load_image_targphys() into RAM addresses. > > > > However, cpu_physical_memory_write_rom(), unlike cpu_physical_memory_rw() > > does invalidate any cached TBs which might be affected by the region > > "doesn't"? > > Otherwise doesn't look wrong. Oops, comment updated. From 6b913afaf83f52ee787271827c84b492e8ac5895 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 22 Aug 2012 14:58:04 +1000 Subject: [PATCH] cpu_physical_memory_write_rom() needs to do TB invalidates cpu_physical_memory_write_rom(), despite the name, can also be used to write images into RAM - and will often be used that way if the machine uses load_image_targphys() into RAM addresses. However, cpu_physical_memory_write_rom(), unlike cpu_physical_memory_rw() doesn't invalidate any cached TBs which might be affected by the region written. This was breaking reset (under full emu) on the pseries machine - we loaded our firmware image into RAM, and while executing it rewrite the code at the entry point (correctly causing a TB invalidate/refresh). When we reset the firmware image was reloaded, but the TB from the rewrite was still active and caused us to get an illegal instruction trap. This patch fixes the bug by duplicating the tb invalidate code from cpu_physical_memory_rw() in cpu_physical_memory_write_rom(). Signed-off-by: David Gibson --- exec.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/exec.c b/exec.c index 5834766..eff40d7 100644 --- a/exec.c +++ b/exec.c @@ -3523,6 +3523,13 @@ void cpu_physical_memory_write_rom(target_phys_addr_t addr, /* ROM/RAM case */ ptr = qemu_get_ram_ptr(addr1); memcpy(ptr, buf, l); + if (!cpu_physical_memory_is_dirty(addr1)) { + /* invalidate code */ + tb_invalidate_phys_page_range(addr1, addr1 + l, 0); + /* set dirty bit */ + cpu_physical_memory_set_dirty_flags( + addr1, (0xff & ~CODE_DIRTY_FLAG)); + } qemu_put_ram_ptr(ptr); } len -= l;