| Message ID | 20120907141841.GF6791@ohm.aurel32.net |
|---|---|
| State | New |
| Headers | show |
On Fri, Sep 07, 2012 at 04:18:41PM +0200, Aurelien Jarno wrote: > On Sun, Sep 02, 2012 at 05:33:47PM +0000, Blue Swirl wrote: > > Add an explicit CPUState parameter instead of relying on AREG0 > > and switch to AREG0 free mode. > > > > Signed-off-by: Blue Swirl <blauwirbel@gmail.com> > > --- > > configure | 2 +- > > target-cris/Makefile.objs | 2 - > > target-cris/helper.c | 4 +- > > target-cris/helper.h | 34 ++++++++-------- > > target-cris/op_helper.c | 89 +++++++++++++++++++++---------------------- > > target-cris/translate.c | 50 ++++++++++++----------- > > target-cris/translate_v10.c | 22 +++++----- > > 7 files changed, 101 insertions(+), 102 deletions(-) > > > > diff --git a/configure b/configure > > index e464d2f..d760e07 100755 > > --- a/configure > > +++ b/configure > > @@ -3829,7 +3829,7 @@ symlink "$source_path/Makefile.target" "$target_dir/Makefile" > > > > > > case "$target_arch2" in > > - alpha | arm* | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) > > + alpha | arm* | cris | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) > > echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak > > ;; > > esac > > diff --git a/target-cris/Makefile.objs b/target-cris/Makefile.objs > > index 4b09e8c..afb87bc 100644 > > --- a/target-cris/Makefile.objs > > +++ b/target-cris/Makefile.objs > > @@ -1,4 +1,2 @@ > > obj-y += translate.o op_helper.o helper.o cpu.o > > obj-$(CONFIG_SOFTMMU) += mmu.o machine.o > > - > > -$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) > > diff --git a/target-cris/helper.c b/target-cris/helper.c > > index bfbc29e..1bdb7e2 100644 > > --- a/target-cris/helper.c > > +++ b/target-cris/helper.c > > @@ -151,7 +151,7 @@ static void do_interruptv10(CPUCRISState *env) > > } > > > > /* Now that we are in kernel mode, load the handlers address. */ > > - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); > > + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); > > env->locked_irq = 1; > > env->pregs[PR_CCS] |= F_FLAG_V10; /* set F. */ > > > > @@ -233,7 +233,7 @@ void do_interrupt(CPUCRISState *env) > > /* Now that we are in kernel mode, load the handlers address. > > This load may not fault, real hw leaves that behaviour as > > undefined. */ > > - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); > > + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); > > > > /* Clear the excption_index to avoid spurios hw_aborts for recursive > > bus faults. */ > > diff --git a/target-cris/helper.h b/target-cris/helper.h > > index 093063a..b575524 100644 > > --- a/target-cris/helper.h > > +++ b/target-cris/helper.h > > @@ -1,26 +1,26 @@ > > #include "def-helper.h" > > > > -DEF_HELPER_1(raise_exception, void, i32) > > -DEF_HELPER_1(tlb_flush_pid, void, i32) > > -DEF_HELPER_1(spc_write, void, i32) > > +DEF_HELPER_2(raise_exception, void, env, i32) > > +DEF_HELPER_2(tlb_flush_pid, void, env, i32) > > +DEF_HELPER_2(spc_write, void, env, i32) > > DEF_HELPER_3(dump, void, i32, i32, i32) > > -DEF_HELPER_0(rfe, void); > > -DEF_HELPER_0(rfn, void); > > +DEF_HELPER_1(rfe, void, env); > > +DEF_HELPER_1(rfn, void, env); > > > > -DEF_HELPER_2(movl_sreg_reg, void, i32, i32) > > -DEF_HELPER_2(movl_reg_sreg, void, i32, i32) > > +DEF_HELPER_3(movl_sreg_reg, void, env, i32, i32) > > +DEF_HELPER_3(movl_reg_sreg, void, env, i32, i32) > > > > DEF_HELPER_FLAGS_1(lz, TCG_CALL_PURE, i32, i32); > > -DEF_HELPER_FLAGS_3(btst, TCG_CALL_PURE, i32, i32, i32, i32); > > +DEF_HELPER_FLAGS_4(btst, TCG_CALL_PURE, i32, env, i32, i32, i32); > > > > -DEF_HELPER_FLAGS_3(evaluate_flags_muls, TCG_CALL_PURE, i32, i32, i32, i32) > > -DEF_HELPER_FLAGS_3(evaluate_flags_mulu, TCG_CALL_PURE, i32, i32, i32, i32) > > -DEF_HELPER_FLAGS_4(evaluate_flags_mcp, TCG_CALL_PURE, i32, i32, i32, i32, i32) > > -DEF_HELPER_FLAGS_4(evaluate_flags_alu_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) > > -DEF_HELPER_FLAGS_4(evaluate_flags_sub_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) > > -DEF_HELPER_FLAGS_2(evaluate_flags_move_4, TCG_CALL_PURE, i32, i32, i32) > > -DEF_HELPER_FLAGS_2(evaluate_flags_move_2, TCG_CALL_PURE, i32, i32, i32) > > -DEF_HELPER_0(evaluate_flags, void) > > -DEF_HELPER_0(top_evaluate_flags, void) > > +DEF_HELPER_FLAGS_4(evaluate_flags_muls, TCG_CALL_PURE, i32, env, i32, i32, i32) > > +DEF_HELPER_FLAGS_4(evaluate_flags_mulu, TCG_CALL_PURE, i32, env, i32, i32, i32) > > +DEF_HELPER_FLAGS_5(evaluate_flags_mcp, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > > +DEF_HELPER_FLAGS_5(evaluate_flags_alu_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > > +DEF_HELPER_FLAGS_5(evaluate_flags_sub_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > > +DEF_HELPER_FLAGS_3(evaluate_flags_move_4, TCG_CALL_PURE, i32, env, i32, i32) > > +DEF_HELPER_FLAGS_3(evaluate_flags_move_2, TCG_CALL_PURE, i32, env, i32, i32) > > +DEF_HELPER_1(evaluate_flags, void, env) > > +DEF_HELPER_1(top_evaluate_flags, void, env) > > > > #include "def-helper.h" > > diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c > > index ac7c98c..5cce3e7 100644 > > --- a/target-cris/op_helper.c > > +++ b/target-cris/op_helper.c > > @@ -19,7 +19,6 @@ > > */ > > > > #include "cpu.h" > > -#include "dyngen-exec.h" > > #include "mmu.h" > > #include "helper.h" > > #include "host-utils.h" > > @@ -55,17 +54,12 @@ > > /* Try to fill the TLB and return an exception if error. If retaddr is > > NULL, it means that the function was called in C code (i.e. not > > from generated code or from helper.c) */ > > -/* XXX: fix it to restore all registers */ > > -void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, > > +void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx, > > uintptr_t retaddr) > > { > > TranslationBlock *tb; > > - CPUCRISState *saved_env; > > int ret; > > > > - saved_env = env; > > - env = env1; > > - > > D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__, > > env->pc, env->debug1, (void *)retaddr); > > ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx); > > @@ -79,23 +73,22 @@ void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, > > cpu_restore_state(tb, env, retaddr); > > > > /* Evaluate flags after retranslation. */ > > - helper_top_evaluate_flags(); > > + helper_top_evaluate_flags(env); > > } > > } > > cpu_loop_exit(env); > > } > > - env = saved_env; > > } > > > > #endif > > > > -void helper_raise_exception(uint32_t index) > > +void helper_raise_exception(CPUCRISState *env, uint32_t index) > > { > > env->exception_index = index; > > cpu_loop_exit(env); > > } > > > > -void helper_tlb_flush_pid(uint32_t pid) > > +void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid) > > { > > #if !defined(CONFIG_USER_ONLY) > > pid &= 0xff; > > @@ -104,7 +97,7 @@ void helper_tlb_flush_pid(uint32_t pid) > > #endif > > } > > > > -void helper_spc_write(uint32_t new_spc) > > +void helper_spc_write(CPUCRISState *env, uint32_t new_spc) > > { > > #if !defined(CONFIG_USER_ONLY) > > tlb_flush_page(env, env->pregs[PR_SPC]); > > @@ -121,7 +114,7 @@ void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2) > > #define EXTRACT_FIELD(src, start, end) \ > > (((src) >> start) & ((1 << (end - start + 1)) - 1)) > > > > -void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) > > +void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) > > { > > uint32_t srs; > > srs = env->pregs[PR_SRS]; > > @@ -171,7 +164,7 @@ void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) > > #endif > > } > > > > -void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg) > > +void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg) > > { > > uint32_t srs; > > env->pregs[PR_SRS] &= 3; > > @@ -216,7 +209,7 @@ static void cris_ccs_rshift(CPUCRISState *env) > > env->pregs[PR_CCS] = ccs; > > } > > > > -void helper_rfe(void) > > +void helper_rfe(CPUCRISState *env) > > { > > int rflag = env->pregs[PR_CCS] & R_FLAG; > > > > @@ -232,7 +225,7 @@ void helper_rfe(void) > > env->pregs[PR_CCS] |= P_FLAG; > > } > > > > -void helper_rfn(void) > > +void helper_rfn(CPUCRISState *env) > > { > > int rflag = env->pregs[PR_CCS] & R_FLAG; > > > > @@ -256,7 +249,7 @@ uint32_t helper_lz(uint32_t t0) > > return clz32(t0); > > } > > > > -uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) > > +uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs) > > { > > /* FIXME: clean this up. */ > > > > @@ -284,7 +277,8 @@ uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) > > return ccs; > > } > > > > -static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) > > +static inline uint32_t evaluate_flags_writeback(CPUCRISState *env, > > + uint32_t flags, uint32_t ccs) > > { > > unsigned int x, z, mask; > > > > @@ -303,7 +297,8 @@ static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) > > return ccs; > > } > > > > -uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) > > +uint32_t helper_evaluate_flags_muls(CPUCRISState *env, uint32_t ccs, > > + uint32_t res, uint32_t mof) > > { > > uint32_t flags = 0; > > int64_t tmp; > > @@ -321,10 +316,11 @@ uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) > > if ((dneg && mof != -1) > > || (!dneg && mof != 0)) > > flags |= V_FLAG; > > - return evaluate_flags_writeback(flags, ccs); > > + return evaluate_flags_writeback(env, flags, ccs); > > } > > > > -uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) > > +uint32_t helper_evaluate_flags_mulu(CPUCRISState *env, uint32_t ccs, > > + uint32_t res, uint32_t mof) > > { > > uint32_t flags = 0; > > uint64_t tmp; > > @@ -339,10 +335,10 @@ uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) > > if (mof) > > flags |= V_FLAG; > > > > - return evaluate_flags_writeback(flags, ccs); > > + return evaluate_flags_writeback(env, flags, ccs); > > } > > > > -uint32_t helper_evaluate_flags_mcp(uint32_t ccs, > > +uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs, > > uint32_t src, uint32_t dst, uint32_t res) > > { > > uint32_t flags = 0; > > @@ -368,10 +364,10 @@ uint32_t helper_evaluate_flags_mcp(uint32_t ccs, > > flags |= R_FLAG; > > } > > > > - return evaluate_flags_writeback(flags, ccs); > > + return evaluate_flags_writeback(env, flags, ccs); > > } > > > > -uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, > > +uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs, > > uint32_t src, uint32_t dst, uint32_t res) > > { > > uint32_t flags = 0; > > @@ -397,10 +393,10 @@ uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, > > flags |= C_FLAG; > > } > > > > - return evaluate_flags_writeback(flags, ccs); > > + return evaluate_flags_writeback(env, flags, ccs); > > } > > > > -uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, > > +uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs, > > uint32_t src, uint32_t dst, uint32_t res) > > { > > uint32_t flags = 0; > > @@ -427,10 +423,11 @@ uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, > > } > > > > flags ^= C_FLAG; > > - return evaluate_flags_writeback(flags, ccs); > > + return evaluate_flags_writeback(env, flags, ccs); > > } > > > > -uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) > > +uint32_t helper_evaluate_flags_move_4(CPUCRISState *env, uint32_t ccs, > > + uint32_t res) > > { > > uint32_t flags = 0; > > > > @@ -439,9 +436,10 @@ uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) > > else if (res == 0L) > > flags |= Z_FLAG; > > > > - return evaluate_flags_writeback(flags, ccs); > > + return evaluate_flags_writeback(env, flags, ccs); > > } > > -uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) > > +uint32_t helper_evaluate_flags_move_2(CPUCRISState *env, uint32_t ccs, > > + uint32_t res) > > { > > uint32_t flags = 0; > > > > @@ -450,12 +448,12 @@ uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) > > else if (res == 0) > > flags |= Z_FLAG; > > > > - return evaluate_flags_writeback(flags, ccs); > > + return evaluate_flags_writeback(env, flags, ccs); > > } > > > > /* TODO: This is expensive. We could split things up and only evaluate part of > > CCR on a need to know basis. For now, we simply re-evaluate everything. */ > > -void helper_evaluate_flags(void) > > +void helper_evaluate_flags(CPUCRISState *env) > > { > > uint32_t src, dst, res; > > uint32_t flags = 0; > > @@ -571,25 +569,26 @@ void helper_evaluate_flags(void) > > if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP) > > flags ^= C_FLAG; > > > > - env->pregs[PR_CCS] = evaluate_flags_writeback(flags, env->pregs[PR_CCS]); > > + env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags, > > + env->pregs[PR_CCS]); > > } > > > > -void helper_top_evaluate_flags(void) > > +void helper_top_evaluate_flags(CPUCRISState *env) > > { > > switch (env->cc_op) > > { > > case CC_OP_MCP: > > - env->pregs[PR_CCS] = helper_evaluate_flags_mcp( > > + env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env, > > env->pregs[PR_CCS], env->cc_src, > > env->cc_dest, env->cc_result); > > break; > > case CC_OP_MULS: > > - env->pregs[PR_CCS] = helper_evaluate_flags_muls( > > + env->pregs[PR_CCS] = helper_evaluate_flags_muls(env, > > env->pregs[PR_CCS], env->cc_result, > > env->pregs[PR_MOF]); > > break; > > case CC_OP_MULU: > > - env->pregs[PR_CCS] = helper_evaluate_flags_mulu( > > + env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env, > > env->pregs[PR_CCS], env->cc_result, > > env->pregs[PR_MOF]); > > break; > > @@ -604,18 +603,18 @@ void helper_top_evaluate_flags(void) > > { > > case 4: > > env->pregs[PR_CCS] = > > - helper_evaluate_flags_move_4( > > + helper_evaluate_flags_move_4(env, > > env->pregs[PR_CCS], > > env->cc_result); > > break; > > case 2: > > env->pregs[PR_CCS] = > > - helper_evaluate_flags_move_2( > > + helper_evaluate_flags_move_2(env, > > env->pregs[PR_CCS], > > env->cc_result); > > break; > > default: > > - helper_evaluate_flags(); > > + helper_evaluate_flags(env); > > break; > > } > > break; > > @@ -626,12 +625,12 @@ void helper_top_evaluate_flags(void) > > case CC_OP_CMP: > > if (env->cc_size == 4) > > env->pregs[PR_CCS] = > > - helper_evaluate_flags_sub_4( > > + helper_evaluate_flags_sub_4(env, > > env->pregs[PR_CCS], > > env->cc_src, env->cc_dest, > > env->cc_result); > > else > > - helper_evaluate_flags(); > > + helper_evaluate_flags(env); > > break; > > default: > > { > > @@ -639,13 +638,13 @@ void helper_top_evaluate_flags(void) > > { > > case 4: > > env->pregs[PR_CCS] = > > - helper_evaluate_flags_alu_4( > > + helper_evaluate_flags_alu_4(env, > > env->pregs[PR_CCS], > > env->cc_src, env->cc_dest, > > env->cc_result); > > break; > > default: > > - helper_evaluate_flags(); > > + helper_evaluate_flags(env); > > break; > > } > > } > > diff --git a/target-cris/translate.c b/target-cris/translate.c > > index 1ad9ec7..5e4f7f5 100644 > > --- a/target-cris/translate.c > > +++ b/target-cris/translate.c > > @@ -211,9 +211,9 @@ static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn) > > tcg_gen_andi_tl(cpu_PR[r], tn, 3); > > else { > > if (r == PR_PID) > > - gen_helper_tlb_flush_pid(tn); > > + gen_helper_tlb_flush_pid(cpu_env, tn); > > if (dc->tb_flags & S_FLAG && r == PR_SPC) > > - gen_helper_spc_write(tn); > > + gen_helper_spc_write(cpu_env, tn); > > else if (r == PR_CCS) > > dc->cpustate_changed = 1; > > tcg_gen_mov_tl(cpu_PR[r], tn); > > @@ -241,24 +241,24 @@ static int cris_fetch(DisasContext *dc, uint32_t addr, > > switch (size) { > > case 4: > > { > > - r = ldl_code(addr); > > + r = cpu_ldl_code(cpu_single_env, addr); > > break; > > } > > case 2: > > { > > if (sign) { > > - r = ldsw_code(addr); > > + r = cpu_ldsw_code(cpu_single_env, addr); > > } else { > > - r = lduw_code(addr); > > + r = cpu_lduw_code(cpu_single_env, addr); > > } > > break; > > } > > case 1: > > { > > if (sign) { > > - r = ldsb_code(addr); > > + r = cpu_ldsb_code(cpu_single_env, addr); > > } else { > > - r = ldub_code(addr); > > + r = cpu_ldub_code(cpu_single_env, addr); > > } > > break; > > } > > @@ -278,7 +278,7 @@ static void cris_lock_irq(DisasContext *dc) > > static inline void t_gen_raise_exception(uint32_t index) > > { > > TCGv_i32 tmp = tcg_const_i32(index); > > - gen_helper_raise_exception(tmp); > > + gen_helper_raise_exception(cpu_env, tmp); > > tcg_temp_free_i32(tmp); > > } > > > > @@ -624,17 +624,17 @@ static void cris_evaluate_flags(DisasContext *dc) > > switch (dc->cc_op) > > { > > case CC_OP_MCP: > > - gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], > > + gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env, > > cpu_PR[PR_CCS], cc_src, > > cc_dest, cc_result); > > break; > > case CC_OP_MULS: > > - gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], > > + gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], cpu_env, > > cpu_PR[PR_CCS], cc_result, > > cpu_PR[PR_MOF]); > > break; > > case CC_OP_MULU: > > - gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], > > + gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], cpu_env, > > cpu_PR[PR_CCS], cc_result, > > cpu_PR[PR_MOF]); > > break; > > @@ -648,15 +648,15 @@ static void cris_evaluate_flags(DisasContext *dc) > > switch (dc->cc_size) > > { > > case 4: > > - gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], > > + gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], cpu_env, > > cpu_PR[PR_CCS], cc_result); > > break; > > case 2: > > - gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], > > + gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], cpu_env, > > cpu_PR[PR_CCS], cc_result); > > break; > > default: > > - gen_helper_evaluate_flags(); > > + gen_helper_evaluate_flags(cpu_env); > > break; > > } > > break; > > @@ -666,21 +666,21 @@ static void cris_evaluate_flags(DisasContext *dc) > > case CC_OP_SUB: > > case CC_OP_CMP: > > if (dc->cc_size == 4) > > - gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], > > + gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], cpu_env, > > cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); > > else > > - gen_helper_evaluate_flags(); > > + gen_helper_evaluate_flags(cpu_env); > > > > break; > > default: > > switch (dc->cc_size) > > { > > case 4: > > - gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], > > + gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], cpu_env, > > cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); > > break; > > default: > > - gen_helper_evaluate_flags(); > > + gen_helper_evaluate_flags(cpu_env); > > break; > > } > > break; > > @@ -1475,7 +1475,7 @@ static int dec_btstq(DisasContext *dc) > > > > cris_cc_mask(dc, CC_MASK_NZ); > > cris_evaluate_flags(dc); > > - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], > > + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], > > tcg_const_tl(dc->op1), cpu_PR[PR_CCS]); > > cris_alu(dc, CC_OP_MOVE, > > cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op2], 4); > > @@ -1925,7 +1925,7 @@ static int dec_btst_r(DisasContext *dc) > > dc->op1, dc->op2); > > cris_cc_mask(dc, CC_MASK_NZ); > > cris_evaluate_flags(dc); > > - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], > > + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], > > cpu_R[dc->op1], cpu_PR[PR_CCS]); > > cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], > > cpu_R[dc->op2], cpu_R[dc->op2], 4); > > @@ -2135,14 +2135,16 @@ static int dec_move_rs(DisasContext *dc) > > { > > LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2); > > cris_cc_mask(dc, 0); > > - gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1)); > > + gen_helper_movl_sreg_reg(cpu_env, tcg_const_tl(dc->op2), > > + tcg_const_tl(dc->op1)); > > return 2; > > } > > static int dec_move_sr(DisasContext *dc) > > { > > LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1); > > cris_cc_mask(dc, 0); > > - gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); > > + gen_helper_movl_reg_sreg(cpu_env, tcg_const_tl(dc->op1), > > + tcg_const_tl(dc->op2)); > > return 2; > > } > > > > @@ -2906,14 +2908,14 @@ static int dec_rfe_etc(DisasContext *dc) > > /* rfe. */ > > LOG_DIS("rfe\n"); > > cris_evaluate_flags(dc); > > - gen_helper_rfe(); > > + gen_helper_rfe(cpu_env); > > dc->is_jmp = DISAS_UPDATE; > > break; > > case 5: > > /* rfn. */ > > LOG_DIS("rfn\n"); > > cris_evaluate_flags(dc); > > - gen_helper_rfn(); > > + gen_helper_rfn(cpu_env); > > dc->is_jmp = DISAS_UPDATE; > > break; > > case 6: > > Similarly to what I reported for the microblaze and sh4 target, I think > we should not start using cpu_single_env (a global variable) to replace > env (a global variable stored in a register). > > It is possible to pass env through the subroutine, though it is more > complicated there than for other targets. I have therefore done the work > and I have attached the two resulting patches to this mail. Hi Aurelien! I agree with your comment and change. The indentation looks a bit odd here though. The CRISv32 port used tabs when written but some patches have made it in that used space, so it's become a bit of a mess. Maybe it's time to convert it to the QEMU codingstyle? From my point of view, I think we should either keep the tabs or change the whole file for 4 space indent. I've got nothing against applying your patch as is and then on top of that the mechanical untabification, to avoid extra work on your side. Cheers, Edgar
On Fri, Sep 07, 2012 at 04:40:03PM +0200, Edgar E. Iglesias wrote: > On Fri, Sep 07, 2012 at 04:18:41PM +0200, Aurelien Jarno wrote: > > On Sun, Sep 02, 2012 at 05:33:47PM +0000, Blue Swirl wrote: > > > Add an explicit CPUState parameter instead of relying on AREG0 > > > and switch to AREG0 free mode. > > > > > > Signed-off-by: Blue Swirl <blauwirbel@gmail.com> > > > --- > > > configure | 2 +- > > > target-cris/Makefile.objs | 2 - > > > target-cris/helper.c | 4 +- > > > target-cris/helper.h | 34 ++++++++-------- > > > target-cris/op_helper.c | 89 +++++++++++++++++++++---------------------- > > > target-cris/translate.c | 50 ++++++++++++----------- > > > target-cris/translate_v10.c | 22 +++++----- > > > 7 files changed, 101 insertions(+), 102 deletions(-) > > > > > > diff --git a/configure b/configure > > > index e464d2f..d760e07 100755 > > > --- a/configure > > > +++ b/configure > > > @@ -3829,7 +3829,7 @@ symlink "$source_path/Makefile.target" "$target_dir/Makefile" > > > > > > > > > case "$target_arch2" in > > > - alpha | arm* | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) > > > + alpha | arm* | cris | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) > > > echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak > > > ;; > > > esac > > > diff --git a/target-cris/Makefile.objs b/target-cris/Makefile.objs > > > index 4b09e8c..afb87bc 100644 > > > --- a/target-cris/Makefile.objs > > > +++ b/target-cris/Makefile.objs > > > @@ -1,4 +1,2 @@ > > > obj-y += translate.o op_helper.o helper.o cpu.o > > > obj-$(CONFIG_SOFTMMU) += mmu.o machine.o > > > - > > > -$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) > > > diff --git a/target-cris/helper.c b/target-cris/helper.c > > > index bfbc29e..1bdb7e2 100644 > > > --- a/target-cris/helper.c > > > +++ b/target-cris/helper.c > > > @@ -151,7 +151,7 @@ static void do_interruptv10(CPUCRISState *env) > > > } > > > > > > /* Now that we are in kernel mode, load the handlers address. */ > > > - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); > > > + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); > > > env->locked_irq = 1; > > > env->pregs[PR_CCS] |= F_FLAG_V10; /* set F. */ > > > > > > @@ -233,7 +233,7 @@ void do_interrupt(CPUCRISState *env) > > > /* Now that we are in kernel mode, load the handlers address. > > > This load may not fault, real hw leaves that behaviour as > > > undefined. */ > > > - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); > > > + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); > > > > > > /* Clear the excption_index to avoid spurios hw_aborts for recursive > > > bus faults. */ > > > diff --git a/target-cris/helper.h b/target-cris/helper.h > > > index 093063a..b575524 100644 > > > --- a/target-cris/helper.h > > > +++ b/target-cris/helper.h > > > @@ -1,26 +1,26 @@ > > > #include "def-helper.h" > > > > > > -DEF_HELPER_1(raise_exception, void, i32) > > > -DEF_HELPER_1(tlb_flush_pid, void, i32) > > > -DEF_HELPER_1(spc_write, void, i32) > > > +DEF_HELPER_2(raise_exception, void, env, i32) > > > +DEF_HELPER_2(tlb_flush_pid, void, env, i32) > > > +DEF_HELPER_2(spc_write, void, env, i32) > > > DEF_HELPER_3(dump, void, i32, i32, i32) > > > -DEF_HELPER_0(rfe, void); > > > -DEF_HELPER_0(rfn, void); > > > +DEF_HELPER_1(rfe, void, env); > > > +DEF_HELPER_1(rfn, void, env); > > > > > > -DEF_HELPER_2(movl_sreg_reg, void, i32, i32) > > > -DEF_HELPER_2(movl_reg_sreg, void, i32, i32) > > > +DEF_HELPER_3(movl_sreg_reg, void, env, i32, i32) > > > +DEF_HELPER_3(movl_reg_sreg, void, env, i32, i32) > > > > > > DEF_HELPER_FLAGS_1(lz, TCG_CALL_PURE, i32, i32); > > > -DEF_HELPER_FLAGS_3(btst, TCG_CALL_PURE, i32, i32, i32, i32); > > > +DEF_HELPER_FLAGS_4(btst, TCG_CALL_PURE, i32, env, i32, i32, i32); > > > > > > -DEF_HELPER_FLAGS_3(evaluate_flags_muls, TCG_CALL_PURE, i32, i32, i32, i32) > > > -DEF_HELPER_FLAGS_3(evaluate_flags_mulu, TCG_CALL_PURE, i32, i32, i32, i32) > > > -DEF_HELPER_FLAGS_4(evaluate_flags_mcp, TCG_CALL_PURE, i32, i32, i32, i32, i32) > > > -DEF_HELPER_FLAGS_4(evaluate_flags_alu_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) > > > -DEF_HELPER_FLAGS_4(evaluate_flags_sub_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) > > > -DEF_HELPER_FLAGS_2(evaluate_flags_move_4, TCG_CALL_PURE, i32, i32, i32) > > > -DEF_HELPER_FLAGS_2(evaluate_flags_move_2, TCG_CALL_PURE, i32, i32, i32) > > > -DEF_HELPER_0(evaluate_flags, void) > > > -DEF_HELPER_0(top_evaluate_flags, void) > > > +DEF_HELPER_FLAGS_4(evaluate_flags_muls, TCG_CALL_PURE, i32, env, i32, i32, i32) > > > +DEF_HELPER_FLAGS_4(evaluate_flags_mulu, TCG_CALL_PURE, i32, env, i32, i32, i32) > > > +DEF_HELPER_FLAGS_5(evaluate_flags_mcp, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > > > +DEF_HELPER_FLAGS_5(evaluate_flags_alu_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > > > +DEF_HELPER_FLAGS_5(evaluate_flags_sub_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > > > +DEF_HELPER_FLAGS_3(evaluate_flags_move_4, TCG_CALL_PURE, i32, env, i32, i32) > > > +DEF_HELPER_FLAGS_3(evaluate_flags_move_2, TCG_CALL_PURE, i32, env, i32, i32) > > > +DEF_HELPER_1(evaluate_flags, void, env) > > > +DEF_HELPER_1(top_evaluate_flags, void, env) > > > > > > #include "def-helper.h" > > > diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c > > > index ac7c98c..5cce3e7 100644 > > > --- a/target-cris/op_helper.c > > > +++ b/target-cris/op_helper.c > > > @@ -19,7 +19,6 @@ > > > */ > > > > > > #include "cpu.h" > > > -#include "dyngen-exec.h" > > > #include "mmu.h" > > > #include "helper.h" > > > #include "host-utils.h" > > > @@ -55,17 +54,12 @@ > > > /* Try to fill the TLB and return an exception if error. If retaddr is > > > NULL, it means that the function was called in C code (i.e. not > > > from generated code or from helper.c) */ > > > -/* XXX: fix it to restore all registers */ > > > -void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, > > > +void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx, > > > uintptr_t retaddr) > > > { > > > TranslationBlock *tb; > > > - CPUCRISState *saved_env; > > > int ret; > > > > > > - saved_env = env; > > > - env = env1; > > > - > > > D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__, > > > env->pc, env->debug1, (void *)retaddr); > > > ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx); > > > @@ -79,23 +73,22 @@ void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, > > > cpu_restore_state(tb, env, retaddr); > > > > > > /* Evaluate flags after retranslation. */ > > > - helper_top_evaluate_flags(); > > > + helper_top_evaluate_flags(env); > > > } > > > } > > > cpu_loop_exit(env); > > > } > > > - env = saved_env; > > > } > > > > > > #endif > > > > > > -void helper_raise_exception(uint32_t index) > > > +void helper_raise_exception(CPUCRISState *env, uint32_t index) > > > { > > > env->exception_index = index; > > > cpu_loop_exit(env); > > > } > > > > > > -void helper_tlb_flush_pid(uint32_t pid) > > > +void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid) > > > { > > > #if !defined(CONFIG_USER_ONLY) > > > pid &= 0xff; > > > @@ -104,7 +97,7 @@ void helper_tlb_flush_pid(uint32_t pid) > > > #endif > > > } > > > > > > -void helper_spc_write(uint32_t new_spc) > > > +void helper_spc_write(CPUCRISState *env, uint32_t new_spc) > > > { > > > #if !defined(CONFIG_USER_ONLY) > > > tlb_flush_page(env, env->pregs[PR_SPC]); > > > @@ -121,7 +114,7 @@ void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2) > > > #define EXTRACT_FIELD(src, start, end) \ > > > (((src) >> start) & ((1 << (end - start + 1)) - 1)) > > > > > > -void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) > > > +void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) > > > { > > > uint32_t srs; > > > srs = env->pregs[PR_SRS]; > > > @@ -171,7 +164,7 @@ void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) > > > #endif > > > } > > > > > > -void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg) > > > +void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg) > > > { > > > uint32_t srs; > > > env->pregs[PR_SRS] &= 3; > > > @@ -216,7 +209,7 @@ static void cris_ccs_rshift(CPUCRISState *env) > > > env->pregs[PR_CCS] = ccs; > > > } > > > > > > -void helper_rfe(void) > > > +void helper_rfe(CPUCRISState *env) > > > { > > > int rflag = env->pregs[PR_CCS] & R_FLAG; > > > > > > @@ -232,7 +225,7 @@ void helper_rfe(void) > > > env->pregs[PR_CCS] |= P_FLAG; > > > } > > > > > > -void helper_rfn(void) > > > +void helper_rfn(CPUCRISState *env) > > > { > > > int rflag = env->pregs[PR_CCS] & R_FLAG; > > > > > > @@ -256,7 +249,7 @@ uint32_t helper_lz(uint32_t t0) > > > return clz32(t0); > > > } > > > > > > -uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) > > > +uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs) > > > { > > > /* FIXME: clean this up. */ > > > > > > @@ -284,7 +277,8 @@ uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) > > > return ccs; > > > } > > > > > > -static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) > > > +static inline uint32_t evaluate_flags_writeback(CPUCRISState *env, > > > + uint32_t flags, uint32_t ccs) > > > { > > > unsigned int x, z, mask; > > > > > > @@ -303,7 +297,8 @@ static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) > > > return ccs; > > > } > > > > > > -uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) > > > +uint32_t helper_evaluate_flags_muls(CPUCRISState *env, uint32_t ccs, > > > + uint32_t res, uint32_t mof) > > > { > > > uint32_t flags = 0; > > > int64_t tmp; > > > @@ -321,10 +316,11 @@ uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) > > > if ((dneg && mof != -1) > > > || (!dneg && mof != 0)) > > > flags |= V_FLAG; > > > - return evaluate_flags_writeback(flags, ccs); > > > + return evaluate_flags_writeback(env, flags, ccs); > > > } > > > > > > -uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) > > > +uint32_t helper_evaluate_flags_mulu(CPUCRISState *env, uint32_t ccs, > > > + uint32_t res, uint32_t mof) > > > { > > > uint32_t flags = 0; > > > uint64_t tmp; > > > @@ -339,10 +335,10 @@ uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) > > > if (mof) > > > flags |= V_FLAG; > > > > > > - return evaluate_flags_writeback(flags, ccs); > > > + return evaluate_flags_writeback(env, flags, ccs); > > > } > > > > > > -uint32_t helper_evaluate_flags_mcp(uint32_t ccs, > > > +uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs, > > > uint32_t src, uint32_t dst, uint32_t res) > > > { > > > uint32_t flags = 0; > > > @@ -368,10 +364,10 @@ uint32_t helper_evaluate_flags_mcp(uint32_t ccs, > > > flags |= R_FLAG; > > > } > > > > > > - return evaluate_flags_writeback(flags, ccs); > > > + return evaluate_flags_writeback(env, flags, ccs); > > > } > > > > > > -uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, > > > +uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs, > > > uint32_t src, uint32_t dst, uint32_t res) > > > { > > > uint32_t flags = 0; > > > @@ -397,10 +393,10 @@ uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, > > > flags |= C_FLAG; > > > } > > > > > > - return evaluate_flags_writeback(flags, ccs); > > > + return evaluate_flags_writeback(env, flags, ccs); > > > } > > > > > > -uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, > > > +uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs, > > > uint32_t src, uint32_t dst, uint32_t res) > > > { > > > uint32_t flags = 0; > > > @@ -427,10 +423,11 @@ uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, > > > } > > > > > > flags ^= C_FLAG; > > > - return evaluate_flags_writeback(flags, ccs); > > > + return evaluate_flags_writeback(env, flags, ccs); > > > } > > > > > > -uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) > > > +uint32_t helper_evaluate_flags_move_4(CPUCRISState *env, uint32_t ccs, > > > + uint32_t res) > > > { > > > uint32_t flags = 0; > > > > > > @@ -439,9 +436,10 @@ uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) > > > else if (res == 0L) > > > flags |= Z_FLAG; > > > > > > - return evaluate_flags_writeback(flags, ccs); > > > + return evaluate_flags_writeback(env, flags, ccs); > > > } > > > -uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) > > > +uint32_t helper_evaluate_flags_move_2(CPUCRISState *env, uint32_t ccs, > > > + uint32_t res) > > > { > > > uint32_t flags = 0; > > > > > > @@ -450,12 +448,12 @@ uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) > > > else if (res == 0) > > > flags |= Z_FLAG; > > > > > > - return evaluate_flags_writeback(flags, ccs); > > > + return evaluate_flags_writeback(env, flags, ccs); > > > } > > > > > > /* TODO: This is expensive. We could split things up and only evaluate part of > > > CCR on a need to know basis. For now, we simply re-evaluate everything. */ > > > -void helper_evaluate_flags(void) > > > +void helper_evaluate_flags(CPUCRISState *env) > > > { > > > uint32_t src, dst, res; > > > uint32_t flags = 0; > > > @@ -571,25 +569,26 @@ void helper_evaluate_flags(void) > > > if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP) > > > flags ^= C_FLAG; > > > > > > - env->pregs[PR_CCS] = evaluate_flags_writeback(flags, env->pregs[PR_CCS]); > > > + env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags, > > > + env->pregs[PR_CCS]); > > > } > > > > > > -void helper_top_evaluate_flags(void) > > > +void helper_top_evaluate_flags(CPUCRISState *env) > > > { > > > switch (env->cc_op) > > > { > > > case CC_OP_MCP: > > > - env->pregs[PR_CCS] = helper_evaluate_flags_mcp( > > > + env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env, > > > env->pregs[PR_CCS], env->cc_src, > > > env->cc_dest, env->cc_result); > > > break; > > > case CC_OP_MULS: > > > - env->pregs[PR_CCS] = helper_evaluate_flags_muls( > > > + env->pregs[PR_CCS] = helper_evaluate_flags_muls(env, > > > env->pregs[PR_CCS], env->cc_result, > > > env->pregs[PR_MOF]); > > > break; > > > case CC_OP_MULU: > > > - env->pregs[PR_CCS] = helper_evaluate_flags_mulu( > > > + env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env, > > > env->pregs[PR_CCS], env->cc_result, > > > env->pregs[PR_MOF]); > > > break; > > > @@ -604,18 +603,18 @@ void helper_top_evaluate_flags(void) > > > { > > > case 4: > > > env->pregs[PR_CCS] = > > > - helper_evaluate_flags_move_4( > > > + helper_evaluate_flags_move_4(env, > > > env->pregs[PR_CCS], > > > env->cc_result); > > > break; > > > case 2: > > > env->pregs[PR_CCS] = > > > - helper_evaluate_flags_move_2( > > > + helper_evaluate_flags_move_2(env, > > > env->pregs[PR_CCS], > > > env->cc_result); > > > break; > > > default: > > > - helper_evaluate_flags(); > > > + helper_evaluate_flags(env); > > > break; > > > } > > > break; > > > @@ -626,12 +625,12 @@ void helper_top_evaluate_flags(void) > > > case CC_OP_CMP: > > > if (env->cc_size == 4) > > > env->pregs[PR_CCS] = > > > - helper_evaluate_flags_sub_4( > > > + helper_evaluate_flags_sub_4(env, > > > env->pregs[PR_CCS], > > > env->cc_src, env->cc_dest, > > > env->cc_result); > > > else > > > - helper_evaluate_flags(); > > > + helper_evaluate_flags(env); > > > break; > > > default: > > > { > > > @@ -639,13 +638,13 @@ void helper_top_evaluate_flags(void) > > > { > > > case 4: > > > env->pregs[PR_CCS] = > > > - helper_evaluate_flags_alu_4( > > > + helper_evaluate_flags_alu_4(env, > > > env->pregs[PR_CCS], > > > env->cc_src, env->cc_dest, > > > env->cc_result); > > > break; > > > default: > > > - helper_evaluate_flags(); > > > + helper_evaluate_flags(env); > > > break; > > > } > > > } > > > diff --git a/target-cris/translate.c b/target-cris/translate.c > > > index 1ad9ec7..5e4f7f5 100644 > > > --- a/target-cris/translate.c > > > +++ b/target-cris/translate.c > > > @@ -211,9 +211,9 @@ static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn) > > > tcg_gen_andi_tl(cpu_PR[r], tn, 3); > > > else { > > > if (r == PR_PID) > > > - gen_helper_tlb_flush_pid(tn); > > > + gen_helper_tlb_flush_pid(cpu_env, tn); > > > if (dc->tb_flags & S_FLAG && r == PR_SPC) > > > - gen_helper_spc_write(tn); > > > + gen_helper_spc_write(cpu_env, tn); > > > else if (r == PR_CCS) > > > dc->cpustate_changed = 1; > > > tcg_gen_mov_tl(cpu_PR[r], tn); > > > @@ -241,24 +241,24 @@ static int cris_fetch(DisasContext *dc, uint32_t addr, > > > switch (size) { > > > case 4: > > > { > > > - r = ldl_code(addr); > > > + r = cpu_ldl_code(cpu_single_env, addr); > > > break; > > > } > > > case 2: > > > { > > > if (sign) { > > > - r = ldsw_code(addr); > > > + r = cpu_ldsw_code(cpu_single_env, addr); > > > } else { > > > - r = lduw_code(addr); > > > + r = cpu_lduw_code(cpu_single_env, addr); > > > } > > > break; > > > } > > > case 1: > > > { > > > if (sign) { > > > - r = ldsb_code(addr); > > > + r = cpu_ldsb_code(cpu_single_env, addr); > > > } else { > > > - r = ldub_code(addr); > > > + r = cpu_ldub_code(cpu_single_env, addr); > > > } > > > break; > > > } > > > @@ -278,7 +278,7 @@ static void cris_lock_irq(DisasContext *dc) > > > static inline void t_gen_raise_exception(uint32_t index) > > > { > > > TCGv_i32 tmp = tcg_const_i32(index); > > > - gen_helper_raise_exception(tmp); > > > + gen_helper_raise_exception(cpu_env, tmp); > > > tcg_temp_free_i32(tmp); > > > } > > > > > > @@ -624,17 +624,17 @@ static void cris_evaluate_flags(DisasContext *dc) > > > switch (dc->cc_op) > > > { > > > case CC_OP_MCP: > > > - gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], > > > + gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env, > > > cpu_PR[PR_CCS], cc_src, > > > cc_dest, cc_result); > > > break; > > > case CC_OP_MULS: > > > - gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], > > > + gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], cpu_env, > > > cpu_PR[PR_CCS], cc_result, > > > cpu_PR[PR_MOF]); > > > break; > > > case CC_OP_MULU: > > > - gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], > > > + gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], cpu_env, > > > cpu_PR[PR_CCS], cc_result, > > > cpu_PR[PR_MOF]); > > > break; > > > @@ -648,15 +648,15 @@ static void cris_evaluate_flags(DisasContext *dc) > > > switch (dc->cc_size) > > > { > > > case 4: > > > - gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], > > > + gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], cpu_env, > > > cpu_PR[PR_CCS], cc_result); > > > break; > > > case 2: > > > - gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], > > > + gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], cpu_env, > > > cpu_PR[PR_CCS], cc_result); > > > break; > > > default: > > > - gen_helper_evaluate_flags(); > > > + gen_helper_evaluate_flags(cpu_env); > > > break; > > > } > > > break; > > > @@ -666,21 +666,21 @@ static void cris_evaluate_flags(DisasContext *dc) > > > case CC_OP_SUB: > > > case CC_OP_CMP: > > > if (dc->cc_size == 4) > > > - gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], > > > + gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], cpu_env, > > > cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); > > > else > > > - gen_helper_evaluate_flags(); > > > + gen_helper_evaluate_flags(cpu_env); > > > > > > break; > > > default: > > > switch (dc->cc_size) > > > { > > > case 4: > > > - gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], > > > + gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], cpu_env, > > > cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); > > > break; > > > default: > > > - gen_helper_evaluate_flags(); > > > + gen_helper_evaluate_flags(cpu_env); > > > break; > > > } > > > break; > > > @@ -1475,7 +1475,7 @@ static int dec_btstq(DisasContext *dc) > > > > > > cris_cc_mask(dc, CC_MASK_NZ); > > > cris_evaluate_flags(dc); > > > - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], > > > + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], > > > tcg_const_tl(dc->op1), cpu_PR[PR_CCS]); > > > cris_alu(dc, CC_OP_MOVE, > > > cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op2], 4); > > > @@ -1925,7 +1925,7 @@ static int dec_btst_r(DisasContext *dc) > > > dc->op1, dc->op2); > > > cris_cc_mask(dc, CC_MASK_NZ); > > > cris_evaluate_flags(dc); > > > - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], > > > + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], > > > cpu_R[dc->op1], cpu_PR[PR_CCS]); > > > cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], > > > cpu_R[dc->op2], cpu_R[dc->op2], 4); > > > @@ -2135,14 +2135,16 @@ static int dec_move_rs(DisasContext *dc) > > > { > > > LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2); > > > cris_cc_mask(dc, 0); > > > - gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1)); > > > + gen_helper_movl_sreg_reg(cpu_env, tcg_const_tl(dc->op2), > > > + tcg_const_tl(dc->op1)); > > > return 2; > > > } > > > static int dec_move_sr(DisasContext *dc) > > > { > > > LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1); > > > cris_cc_mask(dc, 0); > > > - gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); > > > + gen_helper_movl_reg_sreg(cpu_env, tcg_const_tl(dc->op1), > > > + tcg_const_tl(dc->op2)); > > > return 2; > > > } > > > > > > @@ -2906,14 +2908,14 @@ static int dec_rfe_etc(DisasContext *dc) > > > /* rfe. */ > > > LOG_DIS("rfe\n"); > > > cris_evaluate_flags(dc); > > > - gen_helper_rfe(); > > > + gen_helper_rfe(cpu_env); > > > dc->is_jmp = DISAS_UPDATE; > > > break; > > > case 5: > > > /* rfn. */ > > > LOG_DIS("rfn\n"); > > > cris_evaluate_flags(dc); > > > - gen_helper_rfn(); > > > + gen_helper_rfn(cpu_env); > > > dc->is_jmp = DISAS_UPDATE; > > > break; > > > case 6: > > > > Similarly to what I reported for the microblaze and sh4 target, I think > > we should not start using cpu_single_env (a global variable) to replace > > env (a global variable stored in a register). > > > > It is possible to pass env through the subroutine, though it is more > > complicated there than for other targets. I have therefore done the work > > and I have attached the two resulting patches to this mail. > > Hi Aurelien! > > I agree with your comment and change. The indentation looks a bit odd > here though. The CRISv32 port used tabs when written but some patches > have made it in that used space, so it's become a bit of a mess. Maybe > it's time to convert it to the QEMU codingstyle? Yes, I tried to make script/checkpatch.pl happy as I know Blue Swirl really care about that. > From my point of view, I think we should either keep the tabs or change > the whole file for 4 space indent. > > I've got nothing against applying your patch as is and then on top of that > the mechanical untabification, to avoid extra work on your side. > As you prefer, I can also provide the same patches with tabs instead.
> > > case 6: > > > > > > Similarly to what I reported for the microblaze and sh4 target, I think > > > we should not start using cpu_single_env (a global variable) to replace > > > env (a global variable stored in a register). > > > > > > It is possible to pass env through the subroutine, though it is more > > > complicated there than for other targets. I have therefore done the work > > > and I have attached the two resulting patches to this mail. > > > > Hi Aurelien! > > > > I agree with your comment and change. The indentation looks a bit odd > > here though. The CRISv32 port used tabs when written but some patches > > have made it in that used space, so it's become a bit of a mess. Maybe > > it's time to convert it to the QEMU codingstyle? > > Yes, I tried to make script/checkpatch.pl happy as I know Blue Swirl > really care about that. > > > From my point of view, I think we should either keep the tabs or change > > the whole file for 4 space indent. > > > > I've got nothing against applying your patch as is and then on top of that > > the mechanical untabification, to avoid extra work on your side. > > > > As you prefer, I can also provide the same patches with tabs instead. OK, please keep your patch and when it's applied I'll put an untabification on top. Cheers, Edgar
On Fri, Sep 7, 2012 at 2:18 PM, Aurelien Jarno <aurelien@aurel32.net> wrote: > On Sun, Sep 02, 2012 at 05:33:47PM +0000, Blue Swirl wrote: >> Add an explicit CPUState parameter instead of relying on AREG0 >> and switch to AREG0 free mode. >> >> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> >> --- >> configure | 2 +- >> target-cris/Makefile.objs | 2 - >> target-cris/helper.c | 4 +- >> target-cris/helper.h | 34 ++++++++-------- >> target-cris/op_helper.c | 89 +++++++++++++++++++++---------------------- >> target-cris/translate.c | 50 ++++++++++++----------- >> target-cris/translate_v10.c | 22 +++++----- >> 7 files changed, 101 insertions(+), 102 deletions(-) >> >> diff --git a/configure b/configure >> index e464d2f..d760e07 100755 >> --- a/configure >> +++ b/configure >> @@ -3829,7 +3829,7 @@ symlink "$source_path/Makefile.target" "$target_dir/Makefile" >> >> >> case "$target_arch2" in >> - alpha | arm* | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) >> + alpha | arm* | cris | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) >> echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak >> ;; >> esac >> diff --git a/target-cris/Makefile.objs b/target-cris/Makefile.objs >> index 4b09e8c..afb87bc 100644 >> --- a/target-cris/Makefile.objs >> +++ b/target-cris/Makefile.objs >> @@ -1,4 +1,2 @@ >> obj-y += translate.o op_helper.o helper.o cpu.o >> obj-$(CONFIG_SOFTMMU) += mmu.o machine.o >> - >> -$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) >> diff --git a/target-cris/helper.c b/target-cris/helper.c >> index bfbc29e..1bdb7e2 100644 >> --- a/target-cris/helper.c >> +++ b/target-cris/helper.c >> @@ -151,7 +151,7 @@ static void do_interruptv10(CPUCRISState *env) >> } >> >> /* Now that we are in kernel mode, load the handlers address. */ >> - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); >> + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); >> env->locked_irq = 1; >> env->pregs[PR_CCS] |= F_FLAG_V10; /* set F. */ >> >> @@ -233,7 +233,7 @@ void do_interrupt(CPUCRISState *env) >> /* Now that we are in kernel mode, load the handlers address. >> This load may not fault, real hw leaves that behaviour as >> undefined. */ >> - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); >> + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); >> >> /* Clear the excption_index to avoid spurios hw_aborts for recursive >> bus faults. */ >> diff --git a/target-cris/helper.h b/target-cris/helper.h >> index 093063a..b575524 100644 >> --- a/target-cris/helper.h >> +++ b/target-cris/helper.h >> @@ -1,26 +1,26 @@ >> #include "def-helper.h" >> >> -DEF_HELPER_1(raise_exception, void, i32) >> -DEF_HELPER_1(tlb_flush_pid, void, i32) >> -DEF_HELPER_1(spc_write, void, i32) >> +DEF_HELPER_2(raise_exception, void, env, i32) >> +DEF_HELPER_2(tlb_flush_pid, void, env, i32) >> +DEF_HELPER_2(spc_write, void, env, i32) >> DEF_HELPER_3(dump, void, i32, i32, i32) >> -DEF_HELPER_0(rfe, void); >> -DEF_HELPER_0(rfn, void); >> +DEF_HELPER_1(rfe, void, env); >> +DEF_HELPER_1(rfn, void, env); >> >> -DEF_HELPER_2(movl_sreg_reg, void, i32, i32) >> -DEF_HELPER_2(movl_reg_sreg, void, i32, i32) >> +DEF_HELPER_3(movl_sreg_reg, void, env, i32, i32) >> +DEF_HELPER_3(movl_reg_sreg, void, env, i32, i32) >> >> DEF_HELPER_FLAGS_1(lz, TCG_CALL_PURE, i32, i32); >> -DEF_HELPER_FLAGS_3(btst, TCG_CALL_PURE, i32, i32, i32, i32); >> +DEF_HELPER_FLAGS_4(btst, TCG_CALL_PURE, i32, env, i32, i32, i32); >> >> -DEF_HELPER_FLAGS_3(evaluate_flags_muls, TCG_CALL_PURE, i32, i32, i32, i32) >> -DEF_HELPER_FLAGS_3(evaluate_flags_mulu, TCG_CALL_PURE, i32, i32, i32, i32) >> -DEF_HELPER_FLAGS_4(evaluate_flags_mcp, TCG_CALL_PURE, i32, i32, i32, i32, i32) >> -DEF_HELPER_FLAGS_4(evaluate_flags_alu_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) >> -DEF_HELPER_FLAGS_4(evaluate_flags_sub_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) >> -DEF_HELPER_FLAGS_2(evaluate_flags_move_4, TCG_CALL_PURE, i32, i32, i32) >> -DEF_HELPER_FLAGS_2(evaluate_flags_move_2, TCG_CALL_PURE, i32, i32, i32) >> -DEF_HELPER_0(evaluate_flags, void) >> -DEF_HELPER_0(top_evaluate_flags, void) >> +DEF_HELPER_FLAGS_4(evaluate_flags_muls, TCG_CALL_PURE, i32, env, i32, i32, i32) >> +DEF_HELPER_FLAGS_4(evaluate_flags_mulu, TCG_CALL_PURE, i32, env, i32, i32, i32) >> +DEF_HELPER_FLAGS_5(evaluate_flags_mcp, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) >> +DEF_HELPER_FLAGS_5(evaluate_flags_alu_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) >> +DEF_HELPER_FLAGS_5(evaluate_flags_sub_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) >> +DEF_HELPER_FLAGS_3(evaluate_flags_move_4, TCG_CALL_PURE, i32, env, i32, i32) >> +DEF_HELPER_FLAGS_3(evaluate_flags_move_2, TCG_CALL_PURE, i32, env, i32, i32) >> +DEF_HELPER_1(evaluate_flags, void, env) >> +DEF_HELPER_1(top_evaluate_flags, void, env) >> >> #include "def-helper.h" >> diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c >> index ac7c98c..5cce3e7 100644 >> --- a/target-cris/op_helper.c >> +++ b/target-cris/op_helper.c >> @@ -19,7 +19,6 @@ >> */ >> >> #include "cpu.h" >> -#include "dyngen-exec.h" >> #include "mmu.h" >> #include "helper.h" >> #include "host-utils.h" >> @@ -55,17 +54,12 @@ >> /* Try to fill the TLB and return an exception if error. If retaddr is >> NULL, it means that the function was called in C code (i.e. not >> from generated code or from helper.c) */ >> -/* XXX: fix it to restore all registers */ >> -void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, >> +void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx, >> uintptr_t retaddr) >> { >> TranslationBlock *tb; >> - CPUCRISState *saved_env; >> int ret; >> >> - saved_env = env; >> - env = env1; >> - >> D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__, >> env->pc, env->debug1, (void *)retaddr); >> ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx); >> @@ -79,23 +73,22 @@ void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, >> cpu_restore_state(tb, env, retaddr); >> >> /* Evaluate flags after retranslation. */ >> - helper_top_evaluate_flags(); >> + helper_top_evaluate_flags(env); >> } >> } >> cpu_loop_exit(env); >> } >> - env = saved_env; >> } >> >> #endif >> >> -void helper_raise_exception(uint32_t index) >> +void helper_raise_exception(CPUCRISState *env, uint32_t index) >> { >> env->exception_index = index; >> cpu_loop_exit(env); >> } >> >> -void helper_tlb_flush_pid(uint32_t pid) >> +void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid) >> { >> #if !defined(CONFIG_USER_ONLY) >> pid &= 0xff; >> @@ -104,7 +97,7 @@ void helper_tlb_flush_pid(uint32_t pid) >> #endif >> } >> >> -void helper_spc_write(uint32_t new_spc) >> +void helper_spc_write(CPUCRISState *env, uint32_t new_spc) >> { >> #if !defined(CONFIG_USER_ONLY) >> tlb_flush_page(env, env->pregs[PR_SPC]); >> @@ -121,7 +114,7 @@ void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2) >> #define EXTRACT_FIELD(src, start, end) \ >> (((src) >> start) & ((1 << (end - start + 1)) - 1)) >> >> -void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) >> +void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) >> { >> uint32_t srs; >> srs = env->pregs[PR_SRS]; >> @@ -171,7 +164,7 @@ void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) >> #endif >> } >> >> -void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg) >> +void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg) >> { >> uint32_t srs; >> env->pregs[PR_SRS] &= 3; >> @@ -216,7 +209,7 @@ static void cris_ccs_rshift(CPUCRISState *env) >> env->pregs[PR_CCS] = ccs; >> } >> >> -void helper_rfe(void) >> +void helper_rfe(CPUCRISState *env) >> { >> int rflag = env->pregs[PR_CCS] & R_FLAG; >> >> @@ -232,7 +225,7 @@ void helper_rfe(void) >> env->pregs[PR_CCS] |= P_FLAG; >> } >> >> -void helper_rfn(void) >> +void helper_rfn(CPUCRISState *env) >> { >> int rflag = env->pregs[PR_CCS] & R_FLAG; >> >> @@ -256,7 +249,7 @@ uint32_t helper_lz(uint32_t t0) >> return clz32(t0); >> } >> >> -uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) >> +uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs) >> { >> /* FIXME: clean this up. */ >> >> @@ -284,7 +277,8 @@ uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) >> return ccs; >> } >> >> -static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) >> +static inline uint32_t evaluate_flags_writeback(CPUCRISState *env, >> + uint32_t flags, uint32_t ccs) >> { >> unsigned int x, z, mask; >> >> @@ -303,7 +297,8 @@ static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) >> return ccs; >> } >> >> -uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) >> +uint32_t helper_evaluate_flags_muls(CPUCRISState *env, uint32_t ccs, >> + uint32_t res, uint32_t mof) >> { >> uint32_t flags = 0; >> int64_t tmp; >> @@ -321,10 +316,11 @@ uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) >> if ((dneg && mof != -1) >> || (!dneg && mof != 0)) >> flags |= V_FLAG; >> - return evaluate_flags_writeback(flags, ccs); >> + return evaluate_flags_writeback(env, flags, ccs); >> } >> >> -uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) >> +uint32_t helper_evaluate_flags_mulu(CPUCRISState *env, uint32_t ccs, >> + uint32_t res, uint32_t mof) >> { >> uint32_t flags = 0; >> uint64_t tmp; >> @@ -339,10 +335,10 @@ uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) >> if (mof) >> flags |= V_FLAG; >> >> - return evaluate_flags_writeback(flags, ccs); >> + return evaluate_flags_writeback(env, flags, ccs); >> } >> >> -uint32_t helper_evaluate_flags_mcp(uint32_t ccs, >> +uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs, >> uint32_t src, uint32_t dst, uint32_t res) >> { >> uint32_t flags = 0; >> @@ -368,10 +364,10 @@ uint32_t helper_evaluate_flags_mcp(uint32_t ccs, >> flags |= R_FLAG; >> } >> >> - return evaluate_flags_writeback(flags, ccs); >> + return evaluate_flags_writeback(env, flags, ccs); >> } >> >> -uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, >> +uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs, >> uint32_t src, uint32_t dst, uint32_t res) >> { >> uint32_t flags = 0; >> @@ -397,10 +393,10 @@ uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, >> flags |= C_FLAG; >> } >> >> - return evaluate_flags_writeback(flags, ccs); >> + return evaluate_flags_writeback(env, flags, ccs); >> } >> >> -uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, >> +uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs, >> uint32_t src, uint32_t dst, uint32_t res) >> { >> uint32_t flags = 0; >> @@ -427,10 +423,11 @@ uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, >> } >> >> flags ^= C_FLAG; >> - return evaluate_flags_writeback(flags, ccs); >> + return evaluate_flags_writeback(env, flags, ccs); >> } >> >> -uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) >> +uint32_t helper_evaluate_flags_move_4(CPUCRISState *env, uint32_t ccs, >> + uint32_t res) >> { >> uint32_t flags = 0; >> >> @@ -439,9 +436,10 @@ uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) >> else if (res == 0L) >> flags |= Z_FLAG; >> >> - return evaluate_flags_writeback(flags, ccs); >> + return evaluate_flags_writeback(env, flags, ccs); >> } >> -uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) >> +uint32_t helper_evaluate_flags_move_2(CPUCRISState *env, uint32_t ccs, >> + uint32_t res) >> { >> uint32_t flags = 0; >> >> @@ -450,12 +448,12 @@ uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) >> else if (res == 0) >> flags |= Z_FLAG; >> >> - return evaluate_flags_writeback(flags, ccs); >> + return evaluate_flags_writeback(env, flags, ccs); >> } >> >> /* TODO: This is expensive. We could split things up and only evaluate part of >> CCR on a need to know basis. For now, we simply re-evaluate everything. */ >> -void helper_evaluate_flags(void) >> +void helper_evaluate_flags(CPUCRISState *env) >> { >> uint32_t src, dst, res; >> uint32_t flags = 0; >> @@ -571,25 +569,26 @@ void helper_evaluate_flags(void) >> if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP) >> flags ^= C_FLAG; >> >> - env->pregs[PR_CCS] = evaluate_flags_writeback(flags, env->pregs[PR_CCS]); >> + env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags, >> + env->pregs[PR_CCS]); >> } >> >> -void helper_top_evaluate_flags(void) >> +void helper_top_evaluate_flags(CPUCRISState *env) >> { >> switch (env->cc_op) >> { >> case CC_OP_MCP: >> - env->pregs[PR_CCS] = helper_evaluate_flags_mcp( >> + env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env, >> env->pregs[PR_CCS], env->cc_src, >> env->cc_dest, env->cc_result); >> break; >> case CC_OP_MULS: >> - env->pregs[PR_CCS] = helper_evaluate_flags_muls( >> + env->pregs[PR_CCS] = helper_evaluate_flags_muls(env, >> env->pregs[PR_CCS], env->cc_result, >> env->pregs[PR_MOF]); >> break; >> case CC_OP_MULU: >> - env->pregs[PR_CCS] = helper_evaluate_flags_mulu( >> + env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env, >> env->pregs[PR_CCS], env->cc_result, >> env->pregs[PR_MOF]); >> break; >> @@ -604,18 +603,18 @@ void helper_top_evaluate_flags(void) >> { >> case 4: >> env->pregs[PR_CCS] = >> - helper_evaluate_flags_move_4( >> + helper_evaluate_flags_move_4(env, >> env->pregs[PR_CCS], >> env->cc_result); >> break; >> case 2: >> env->pregs[PR_CCS] = >> - helper_evaluate_flags_move_2( >> + helper_evaluate_flags_move_2(env, >> env->pregs[PR_CCS], >> env->cc_result); >> break; >> default: >> - helper_evaluate_flags(); >> + helper_evaluate_flags(env); >> break; >> } >> break; >> @@ -626,12 +625,12 @@ void helper_top_evaluate_flags(void) >> case CC_OP_CMP: >> if (env->cc_size == 4) >> env->pregs[PR_CCS] = >> - helper_evaluate_flags_sub_4( >> + helper_evaluate_flags_sub_4(env, >> env->pregs[PR_CCS], >> env->cc_src, env->cc_dest, >> env->cc_result); >> else >> - helper_evaluate_flags(); >> + helper_evaluate_flags(env); >> break; >> default: >> { >> @@ -639,13 +638,13 @@ void helper_top_evaluate_flags(void) >> { >> case 4: >> env->pregs[PR_CCS] = >> - helper_evaluate_flags_alu_4( >> + helper_evaluate_flags_alu_4(env, >> env->pregs[PR_CCS], >> env->cc_src, env->cc_dest, >> env->cc_result); >> break; >> default: >> - helper_evaluate_flags(); >> + helper_evaluate_flags(env); >> break; >> } >> } >> diff --git a/target-cris/translate.c b/target-cris/translate.c >> index 1ad9ec7..5e4f7f5 100644 >> --- a/target-cris/translate.c >> +++ b/target-cris/translate.c >> @@ -211,9 +211,9 @@ static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn) >> tcg_gen_andi_tl(cpu_PR[r], tn, 3); >> else { >> if (r == PR_PID) >> - gen_helper_tlb_flush_pid(tn); >> + gen_helper_tlb_flush_pid(cpu_env, tn); >> if (dc->tb_flags & S_FLAG && r == PR_SPC) >> - gen_helper_spc_write(tn); >> + gen_helper_spc_write(cpu_env, tn); >> else if (r == PR_CCS) >> dc->cpustate_changed = 1; >> tcg_gen_mov_tl(cpu_PR[r], tn); >> @@ -241,24 +241,24 @@ static int cris_fetch(DisasContext *dc, uint32_t addr, >> switch (size) { >> case 4: >> { >> - r = ldl_code(addr); >> + r = cpu_ldl_code(cpu_single_env, addr); >> break; >> } >> case 2: >> { >> if (sign) { >> - r = ldsw_code(addr); >> + r = cpu_ldsw_code(cpu_single_env, addr); >> } else { >> - r = lduw_code(addr); >> + r = cpu_lduw_code(cpu_single_env, addr); >> } >> break; >> } >> case 1: >> { >> if (sign) { >> - r = ldsb_code(addr); >> + r = cpu_ldsb_code(cpu_single_env, addr); >> } else { >> - r = ldub_code(addr); >> + r = cpu_ldub_code(cpu_single_env, addr); >> } >> break; >> } >> @@ -278,7 +278,7 @@ static void cris_lock_irq(DisasContext *dc) >> static inline void t_gen_raise_exception(uint32_t index) >> { >> TCGv_i32 tmp = tcg_const_i32(index); >> - gen_helper_raise_exception(tmp); >> + gen_helper_raise_exception(cpu_env, tmp); >> tcg_temp_free_i32(tmp); >> } >> >> @@ -624,17 +624,17 @@ static void cris_evaluate_flags(DisasContext *dc) >> switch (dc->cc_op) >> { >> case CC_OP_MCP: >> - gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], >> + gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env, >> cpu_PR[PR_CCS], cc_src, >> cc_dest, cc_result); >> break; >> case CC_OP_MULS: >> - gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], >> + gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], cpu_env, >> cpu_PR[PR_CCS], cc_result, >> cpu_PR[PR_MOF]); >> break; >> case CC_OP_MULU: >> - gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], >> + gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], cpu_env, >> cpu_PR[PR_CCS], cc_result, >> cpu_PR[PR_MOF]); >> break; >> @@ -648,15 +648,15 @@ static void cris_evaluate_flags(DisasContext *dc) >> switch (dc->cc_size) >> { >> case 4: >> - gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], >> + gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], cpu_env, >> cpu_PR[PR_CCS], cc_result); >> break; >> case 2: >> - gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], >> + gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], cpu_env, >> cpu_PR[PR_CCS], cc_result); >> break; >> default: >> - gen_helper_evaluate_flags(); >> + gen_helper_evaluate_flags(cpu_env); >> break; >> } >> break; >> @@ -666,21 +666,21 @@ static void cris_evaluate_flags(DisasContext *dc) >> case CC_OP_SUB: >> case CC_OP_CMP: >> if (dc->cc_size == 4) >> - gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], >> + gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], cpu_env, >> cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); >> else >> - gen_helper_evaluate_flags(); >> + gen_helper_evaluate_flags(cpu_env); >> >> break; >> default: >> switch (dc->cc_size) >> { >> case 4: >> - gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], >> + gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], cpu_env, >> cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); >> break; >> default: >> - gen_helper_evaluate_flags(); >> + gen_helper_evaluate_flags(cpu_env); >> break; >> } >> break; >> @@ -1475,7 +1475,7 @@ static int dec_btstq(DisasContext *dc) >> >> cris_cc_mask(dc, CC_MASK_NZ); >> cris_evaluate_flags(dc); >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], >> tcg_const_tl(dc->op1), cpu_PR[PR_CCS]); >> cris_alu(dc, CC_OP_MOVE, >> cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op2], 4); >> @@ -1925,7 +1925,7 @@ static int dec_btst_r(DisasContext *dc) >> dc->op1, dc->op2); >> cris_cc_mask(dc, CC_MASK_NZ); >> cris_evaluate_flags(dc); >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], >> cpu_R[dc->op1], cpu_PR[PR_CCS]); >> cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], >> cpu_R[dc->op2], cpu_R[dc->op2], 4); >> @@ -2135,14 +2135,16 @@ static int dec_move_rs(DisasContext *dc) >> { >> LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2); >> cris_cc_mask(dc, 0); >> - gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1)); >> + gen_helper_movl_sreg_reg(cpu_env, tcg_const_tl(dc->op2), >> + tcg_const_tl(dc->op1)); >> return 2; >> } >> static int dec_move_sr(DisasContext *dc) >> { >> LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1); >> cris_cc_mask(dc, 0); >> - gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); >> + gen_helper_movl_reg_sreg(cpu_env, tcg_const_tl(dc->op1), >> + tcg_const_tl(dc->op2)); >> return 2; >> } >> >> @@ -2906,14 +2908,14 @@ static int dec_rfe_etc(DisasContext *dc) >> /* rfe. */ >> LOG_DIS("rfe\n"); >> cris_evaluate_flags(dc); >> - gen_helper_rfe(); >> + gen_helper_rfe(cpu_env); >> dc->is_jmp = DISAS_UPDATE; >> break; >> case 5: >> /* rfn. */ >> LOG_DIS("rfn\n"); >> cris_evaluate_flags(dc); >> - gen_helper_rfn(); >> + gen_helper_rfn(cpu_env); >> dc->is_jmp = DISAS_UPDATE; >> break; >> case 6: >> diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c >> index 3629629..d9d6aa5 100644 >> --- a/target-cris/translate_v10.c >> +++ b/target-cris/translate_v10.c >> @@ -182,17 +182,17 @@ static int dec10_prep_move_m(DisasContext *dc, int s_ext, int memsize, >> if (memsize != 4) { >> if (s_ext) { >> if (memsize == 1) >> - imm = ldsb_code(dc->pc + 2); >> + imm = cpu_ldsb_code(cpu_single_env, dc->pc + 2); >> else >> - imm = ldsw_code(dc->pc + 2); >> + imm = cpu_ldsw_code(cpu_single_env, dc->pc + 2); >> } else { >> if (memsize == 1) >> - imm = ldub_code(dc->pc + 2); >> + imm = cpu_ldub_code(cpu_single_env, dc->pc + 2); >> else >> - imm = lduw_code(dc->pc + 2); >> + imm = cpu_lduw_code(cpu_single_env, dc->pc + 2); >> } >> } else >> - imm = ldl_code(dc->pc + 2); >> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2); >> >> tcg_gen_movi_tl(dst, imm); > > Similarly to what I reported for the microblaze and sh4 target, I think > we should not start using cpu_single_env (a global variable) to replace > env (a global variable stored in a register). This task could be also taken to a different patch series, because the conversions committed earlier also used cpu_single_env. Eliminating cpu_single_env altogether may be possible but it would need some refactoring. > > It is possible to pass env through the subroutine, though it is more > complicated there than for other targets. I have therefore done the work > and I have attached the two resulting patches to this mail. Thank you for the work, the patches look better. I think the patches should also include my sign-off. > >> @@ -289,7 +289,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc) >> } else { >> /* BTST */ >> cris_update_cc_op(dc, CC_OP_FLAGS, 4); >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst], >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst], >> tcg_const_tl(imm), cpu_PR[PR_CCS]); >> } >> break; >> @@ -723,7 +723,7 @@ static unsigned int dec10_reg(DisasContext *dc) >> LOG_DIS("btst $r%d, $r%d sz=%d\n", dc->src, dc->dst, size); >> cris_cc_mask(dc, CC_MASK_NZVC); >> cris_update_cc_op(dc, CC_OP_FLAGS, 4); >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst], >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst], >> cpu_R[dc->src], cpu_PR[PR_CCS]); >> break; >> case CRISV10_REG_DSTEP: >> @@ -974,7 +974,7 @@ static int dec10_dip(DisasContext *dc) >> LOG_DIS("dip pc=%x opcode=%d r%d r%d\n", >> dc->pc, dc->opcode, dc->src, dc->dst); >> if (dc->src == 15) { >> - imm = ldl_code(dc->pc + 2); >> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2); >> tcg_gen_movi_tl(cpu_PR[PR_PREFIX], imm); >> if (dc->postinc) >> insn_len += 4; >> @@ -1119,7 +1119,7 @@ static unsigned int dec10_ind(DisasContext *dc) >> if (dc->src == 15) { >> LOG_DIS("jump.%d %d r%d r%d direct\n", size, >> dc->opcode, dc->src, dc->dst); >> - imm = ldl_code(dc->pc + 2); >> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2); >> if (dc->mode == CRISV10_MODE_AUTOINC) >> insn_len += size; >> >> @@ -1185,7 +1185,7 @@ static unsigned int dec10_ind(DisasContext *dc) >> case CRISV10_IND_BCC_M: >> >> cris_cc_mask(dc, 0); >> - imm = ldsw_code(dc->pc + 2); >> + imm = cpu_ldsw_code(cpu_single_env, dc->pc + 2); >> simm = (int16_t)imm; >> simm += 4; >> >> @@ -1210,7 +1210,7 @@ static unsigned int crisv10_decoder(DisasContext *dc) >> tcg_gen_debug_insn_start(dc->pc); >> >> /* Load a halfword onto the instruction register. */ >> - dc->ir = lduw_code(dc->pc); >> + dc->ir = cpu_lduw_code(cpu_single_env, dc->pc); >> >> /* Now decode it. */ >> dc->opcode = EXTRACT_FIELD(dc->ir, 6, 9); >> -- >> 1.7.2.5 >> >> >> > > -- > Aurelien Jarno GPG: 1024D/F1BCDB73 > aurelien@aurel32.net http://www.aurel32.net
On Sat, Sep 08, 2012 at 08:35:18AM +0000, Blue Swirl wrote: > On Fri, Sep 7, 2012 at 2:18 PM, Aurelien Jarno <aurelien@aurel32.net> wrote: > > On Sun, Sep 02, 2012 at 05:33:47PM +0000, Blue Swirl wrote: > >> Add an explicit CPUState parameter instead of relying on AREG0 > >> and switch to AREG0 free mode. > >> > >> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> > >> --- > >> configure | 2 +- > >> target-cris/Makefile.objs | 2 - > >> target-cris/helper.c | 4 +- > >> target-cris/helper.h | 34 ++++++++-------- > >> target-cris/op_helper.c | 89 +++++++++++++++++++++---------------------- > >> target-cris/translate.c | 50 ++++++++++++----------- > >> target-cris/translate_v10.c | 22 +++++----- > >> 7 files changed, 101 insertions(+), 102 deletions(-) > >> > >> diff --git a/configure b/configure > >> index e464d2f..d760e07 100755 > >> --- a/configure > >> +++ b/configure > >> @@ -3829,7 +3829,7 @@ symlink "$source_path/Makefile.target" "$target_dir/Makefile" > >> > >> > >> case "$target_arch2" in > >> - alpha | arm* | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) > >> + alpha | arm* | cris | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) > >> echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak > >> ;; > >> esac > >> diff --git a/target-cris/Makefile.objs b/target-cris/Makefile.objs > >> index 4b09e8c..afb87bc 100644 > >> --- a/target-cris/Makefile.objs > >> +++ b/target-cris/Makefile.objs > >> @@ -1,4 +1,2 @@ > >> obj-y += translate.o op_helper.o helper.o cpu.o > >> obj-$(CONFIG_SOFTMMU) += mmu.o machine.o > >> - > >> -$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) > >> diff --git a/target-cris/helper.c b/target-cris/helper.c > >> index bfbc29e..1bdb7e2 100644 > >> --- a/target-cris/helper.c > >> +++ b/target-cris/helper.c > >> @@ -151,7 +151,7 @@ static void do_interruptv10(CPUCRISState *env) > >> } > >> > >> /* Now that we are in kernel mode, load the handlers address. */ > >> - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); > >> + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); > >> env->locked_irq = 1; > >> env->pregs[PR_CCS] |= F_FLAG_V10; /* set F. */ > >> > >> @@ -233,7 +233,7 @@ void do_interrupt(CPUCRISState *env) > >> /* Now that we are in kernel mode, load the handlers address. > >> This load may not fault, real hw leaves that behaviour as > >> undefined. */ > >> - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); > >> + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); > >> > >> /* Clear the excption_index to avoid spurios hw_aborts for recursive > >> bus faults. */ > >> diff --git a/target-cris/helper.h b/target-cris/helper.h > >> index 093063a..b575524 100644 > >> --- a/target-cris/helper.h > >> +++ b/target-cris/helper.h > >> @@ -1,26 +1,26 @@ > >> #include "def-helper.h" > >> > >> -DEF_HELPER_1(raise_exception, void, i32) > >> -DEF_HELPER_1(tlb_flush_pid, void, i32) > >> -DEF_HELPER_1(spc_write, void, i32) > >> +DEF_HELPER_2(raise_exception, void, env, i32) > >> +DEF_HELPER_2(tlb_flush_pid, void, env, i32) > >> +DEF_HELPER_2(spc_write, void, env, i32) > >> DEF_HELPER_3(dump, void, i32, i32, i32) > >> -DEF_HELPER_0(rfe, void); > >> -DEF_HELPER_0(rfn, void); > >> +DEF_HELPER_1(rfe, void, env); > >> +DEF_HELPER_1(rfn, void, env); > >> > >> -DEF_HELPER_2(movl_sreg_reg, void, i32, i32) > >> -DEF_HELPER_2(movl_reg_sreg, void, i32, i32) > >> +DEF_HELPER_3(movl_sreg_reg, void, env, i32, i32) > >> +DEF_HELPER_3(movl_reg_sreg, void, env, i32, i32) > >> > >> DEF_HELPER_FLAGS_1(lz, TCG_CALL_PURE, i32, i32); > >> -DEF_HELPER_FLAGS_3(btst, TCG_CALL_PURE, i32, i32, i32, i32); > >> +DEF_HELPER_FLAGS_4(btst, TCG_CALL_PURE, i32, env, i32, i32, i32); > >> > >> -DEF_HELPER_FLAGS_3(evaluate_flags_muls, TCG_CALL_PURE, i32, i32, i32, i32) > >> -DEF_HELPER_FLAGS_3(evaluate_flags_mulu, TCG_CALL_PURE, i32, i32, i32, i32) > >> -DEF_HELPER_FLAGS_4(evaluate_flags_mcp, TCG_CALL_PURE, i32, i32, i32, i32, i32) > >> -DEF_HELPER_FLAGS_4(evaluate_flags_alu_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) > >> -DEF_HELPER_FLAGS_4(evaluate_flags_sub_4, TCG_CALL_PURE, i32, i32, i32, i32, i32) > >> -DEF_HELPER_FLAGS_2(evaluate_flags_move_4, TCG_CALL_PURE, i32, i32, i32) > >> -DEF_HELPER_FLAGS_2(evaluate_flags_move_2, TCG_CALL_PURE, i32, i32, i32) > >> -DEF_HELPER_0(evaluate_flags, void) > >> -DEF_HELPER_0(top_evaluate_flags, void) > >> +DEF_HELPER_FLAGS_4(evaluate_flags_muls, TCG_CALL_PURE, i32, env, i32, i32, i32) > >> +DEF_HELPER_FLAGS_4(evaluate_flags_mulu, TCG_CALL_PURE, i32, env, i32, i32, i32) > >> +DEF_HELPER_FLAGS_5(evaluate_flags_mcp, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > >> +DEF_HELPER_FLAGS_5(evaluate_flags_alu_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > >> +DEF_HELPER_FLAGS_5(evaluate_flags_sub_4, TCG_CALL_PURE, i32, env, i32, i32, i32, i32) > >> +DEF_HELPER_FLAGS_3(evaluate_flags_move_4, TCG_CALL_PURE, i32, env, i32, i32) > >> +DEF_HELPER_FLAGS_3(evaluate_flags_move_2, TCG_CALL_PURE, i32, env, i32, i32) > >> +DEF_HELPER_1(evaluate_flags, void, env) > >> +DEF_HELPER_1(top_evaluate_flags, void, env) > >> > >> #include "def-helper.h" > >> diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c > >> index ac7c98c..5cce3e7 100644 > >> --- a/target-cris/op_helper.c > >> +++ b/target-cris/op_helper.c > >> @@ -19,7 +19,6 @@ > >> */ > >> > >> #include "cpu.h" > >> -#include "dyngen-exec.h" > >> #include "mmu.h" > >> #include "helper.h" > >> #include "host-utils.h" > >> @@ -55,17 +54,12 @@ > >> /* Try to fill the TLB and return an exception if error. If retaddr is > >> NULL, it means that the function was called in C code (i.e. not > >> from generated code or from helper.c) */ > >> -/* XXX: fix it to restore all registers */ > >> -void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, > >> +void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx, > >> uintptr_t retaddr) > >> { > >> TranslationBlock *tb; > >> - CPUCRISState *saved_env; > >> int ret; > >> > >> - saved_env = env; > >> - env = env1; > >> - > >> D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__, > >> env->pc, env->debug1, (void *)retaddr); > >> ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx); > >> @@ -79,23 +73,22 @@ void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, > >> cpu_restore_state(tb, env, retaddr); > >> > >> /* Evaluate flags after retranslation. */ > >> - helper_top_evaluate_flags(); > >> + helper_top_evaluate_flags(env); > >> } > >> } > >> cpu_loop_exit(env); > >> } > >> - env = saved_env; > >> } > >> > >> #endif > >> > >> -void helper_raise_exception(uint32_t index) > >> +void helper_raise_exception(CPUCRISState *env, uint32_t index) > >> { > >> env->exception_index = index; > >> cpu_loop_exit(env); > >> } > >> > >> -void helper_tlb_flush_pid(uint32_t pid) > >> +void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid) > >> { > >> #if !defined(CONFIG_USER_ONLY) > >> pid &= 0xff; > >> @@ -104,7 +97,7 @@ void helper_tlb_flush_pid(uint32_t pid) > >> #endif > >> } > >> > >> -void helper_spc_write(uint32_t new_spc) > >> +void helper_spc_write(CPUCRISState *env, uint32_t new_spc) > >> { > >> #if !defined(CONFIG_USER_ONLY) > >> tlb_flush_page(env, env->pregs[PR_SPC]); > >> @@ -121,7 +114,7 @@ void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2) > >> #define EXTRACT_FIELD(src, start, end) \ > >> (((src) >> start) & ((1 << (end - start + 1)) - 1)) > >> > >> -void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) > >> +void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg) > >> { > >> uint32_t srs; > >> srs = env->pregs[PR_SRS]; > >> @@ -171,7 +164,7 @@ void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg) > >> #endif > >> } > >> > >> -void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg) > >> +void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg) > >> { > >> uint32_t srs; > >> env->pregs[PR_SRS] &= 3; > >> @@ -216,7 +209,7 @@ static void cris_ccs_rshift(CPUCRISState *env) > >> env->pregs[PR_CCS] = ccs; > >> } > >> > >> -void helper_rfe(void) > >> +void helper_rfe(CPUCRISState *env) > >> { > >> int rflag = env->pregs[PR_CCS] & R_FLAG; > >> > >> @@ -232,7 +225,7 @@ void helper_rfe(void) > >> env->pregs[PR_CCS] |= P_FLAG; > >> } > >> > >> -void helper_rfn(void) > >> +void helper_rfn(CPUCRISState *env) > >> { > >> int rflag = env->pregs[PR_CCS] & R_FLAG; > >> > >> @@ -256,7 +249,7 @@ uint32_t helper_lz(uint32_t t0) > >> return clz32(t0); > >> } > >> > >> -uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) > >> +uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs) > >> { > >> /* FIXME: clean this up. */ > >> > >> @@ -284,7 +277,8 @@ uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs) > >> return ccs; > >> } > >> > >> -static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) > >> +static inline uint32_t evaluate_flags_writeback(CPUCRISState *env, > >> + uint32_t flags, uint32_t ccs) > >> { > >> unsigned int x, z, mask; > >> > >> @@ -303,7 +297,8 @@ static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t ccs) > >> return ccs; > >> } > >> > >> -uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) > >> +uint32_t helper_evaluate_flags_muls(CPUCRISState *env, uint32_t ccs, > >> + uint32_t res, uint32_t mof) > >> { > >> uint32_t flags = 0; > >> int64_t tmp; > >> @@ -321,10 +316,11 @@ uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t mof) > >> if ((dneg && mof != -1) > >> || (!dneg && mof != 0)) > >> flags |= V_FLAG; > >> - return evaluate_flags_writeback(flags, ccs); > >> + return evaluate_flags_writeback(env, flags, ccs); > >> } > >> > >> -uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) > >> +uint32_t helper_evaluate_flags_mulu(CPUCRISState *env, uint32_t ccs, > >> + uint32_t res, uint32_t mof) > >> { > >> uint32_t flags = 0; > >> uint64_t tmp; > >> @@ -339,10 +335,10 @@ uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t mof) > >> if (mof) > >> flags |= V_FLAG; > >> > >> - return evaluate_flags_writeback(flags, ccs); > >> + return evaluate_flags_writeback(env, flags, ccs); > >> } > >> > >> -uint32_t helper_evaluate_flags_mcp(uint32_t ccs, > >> +uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs, > >> uint32_t src, uint32_t dst, uint32_t res) > >> { > >> uint32_t flags = 0; > >> @@ -368,10 +364,10 @@ uint32_t helper_evaluate_flags_mcp(uint32_t ccs, > >> flags |= R_FLAG; > >> } > >> > >> - return evaluate_flags_writeback(flags, ccs); > >> + return evaluate_flags_writeback(env, flags, ccs); > >> } > >> > >> -uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, > >> +uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs, > >> uint32_t src, uint32_t dst, uint32_t res) > >> { > >> uint32_t flags = 0; > >> @@ -397,10 +393,10 @@ uint32_t helper_evaluate_flags_alu_4(uint32_t ccs, > >> flags |= C_FLAG; > >> } > >> > >> - return evaluate_flags_writeback(flags, ccs); > >> + return evaluate_flags_writeback(env, flags, ccs); > >> } > >> > >> -uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, > >> +uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs, > >> uint32_t src, uint32_t dst, uint32_t res) > >> { > >> uint32_t flags = 0; > >> @@ -427,10 +423,11 @@ uint32_t helper_evaluate_flags_sub_4(uint32_t ccs, > >> } > >> > >> flags ^= C_FLAG; > >> - return evaluate_flags_writeback(flags, ccs); > >> + return evaluate_flags_writeback(env, flags, ccs); > >> } > >> > >> -uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) > >> +uint32_t helper_evaluate_flags_move_4(CPUCRISState *env, uint32_t ccs, > >> + uint32_t res) > >> { > >> uint32_t flags = 0; > >> > >> @@ -439,9 +436,10 @@ uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res) > >> else if (res == 0L) > >> flags |= Z_FLAG; > >> > >> - return evaluate_flags_writeback(flags, ccs); > >> + return evaluate_flags_writeback(env, flags, ccs); > >> } > >> -uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) > >> +uint32_t helper_evaluate_flags_move_2(CPUCRISState *env, uint32_t ccs, > >> + uint32_t res) > >> { > >> uint32_t flags = 0; > >> > >> @@ -450,12 +448,12 @@ uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res) > >> else if (res == 0) > >> flags |= Z_FLAG; > >> > >> - return evaluate_flags_writeback(flags, ccs); > >> + return evaluate_flags_writeback(env, flags, ccs); > >> } > >> > >> /* TODO: This is expensive. We could split things up and only evaluate part of > >> CCR on a need to know basis. For now, we simply re-evaluate everything. */ > >> -void helper_evaluate_flags(void) > >> +void helper_evaluate_flags(CPUCRISState *env) > >> { > >> uint32_t src, dst, res; > >> uint32_t flags = 0; > >> @@ -571,25 +569,26 @@ void helper_evaluate_flags(void) > >> if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP) > >> flags ^= C_FLAG; > >> > >> - env->pregs[PR_CCS] = evaluate_flags_writeback(flags, env->pregs[PR_CCS]); > >> + env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags, > >> + env->pregs[PR_CCS]); > >> } > >> > >> -void helper_top_evaluate_flags(void) > >> +void helper_top_evaluate_flags(CPUCRISState *env) > >> { > >> switch (env->cc_op) > >> { > >> case CC_OP_MCP: > >> - env->pregs[PR_CCS] = helper_evaluate_flags_mcp( > >> + env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env, > >> env->pregs[PR_CCS], env->cc_src, > >> env->cc_dest, env->cc_result); > >> break; > >> case CC_OP_MULS: > >> - env->pregs[PR_CCS] = helper_evaluate_flags_muls( > >> + env->pregs[PR_CCS] = helper_evaluate_flags_muls(env, > >> env->pregs[PR_CCS], env->cc_result, > >> env->pregs[PR_MOF]); > >> break; > >> case CC_OP_MULU: > >> - env->pregs[PR_CCS] = helper_evaluate_flags_mulu( > >> + env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env, > >> env->pregs[PR_CCS], env->cc_result, > >> env->pregs[PR_MOF]); > >> break; > >> @@ -604,18 +603,18 @@ void helper_top_evaluate_flags(void) > >> { > >> case 4: > >> env->pregs[PR_CCS] = > >> - helper_evaluate_flags_move_4( > >> + helper_evaluate_flags_move_4(env, > >> env->pregs[PR_CCS], > >> env->cc_result); > >> break; > >> case 2: > >> env->pregs[PR_CCS] = > >> - helper_evaluate_flags_move_2( > >> + helper_evaluate_flags_move_2(env, > >> env->pregs[PR_CCS], > >> env->cc_result); > >> break; > >> default: > >> - helper_evaluate_flags(); > >> + helper_evaluate_flags(env); > >> break; > >> } > >> break; > >> @@ -626,12 +625,12 @@ void helper_top_evaluate_flags(void) > >> case CC_OP_CMP: > >> if (env->cc_size == 4) > >> env->pregs[PR_CCS] = > >> - helper_evaluate_flags_sub_4( > >> + helper_evaluate_flags_sub_4(env, > >> env->pregs[PR_CCS], > >> env->cc_src, env->cc_dest, > >> env->cc_result); > >> else > >> - helper_evaluate_flags(); > >> + helper_evaluate_flags(env); > >> break; > >> default: > >> { > >> @@ -639,13 +638,13 @@ void helper_top_evaluate_flags(void) > >> { > >> case 4: > >> env->pregs[PR_CCS] = > >> - helper_evaluate_flags_alu_4( > >> + helper_evaluate_flags_alu_4(env, > >> env->pregs[PR_CCS], > >> env->cc_src, env->cc_dest, > >> env->cc_result); > >> break; > >> default: > >> - helper_evaluate_flags(); > >> + helper_evaluate_flags(env); > >> break; > >> } > >> } > >> diff --git a/target-cris/translate.c b/target-cris/translate.c > >> index 1ad9ec7..5e4f7f5 100644 > >> --- a/target-cris/translate.c > >> +++ b/target-cris/translate.c > >> @@ -211,9 +211,9 @@ static inline void t_gen_mov_preg_TN(DisasContext *dc, int r, TCGv tn) > >> tcg_gen_andi_tl(cpu_PR[r], tn, 3); > >> else { > >> if (r == PR_PID) > >> - gen_helper_tlb_flush_pid(tn); > >> + gen_helper_tlb_flush_pid(cpu_env, tn); > >> if (dc->tb_flags & S_FLAG && r == PR_SPC) > >> - gen_helper_spc_write(tn); > >> + gen_helper_spc_write(cpu_env, tn); > >> else if (r == PR_CCS) > >> dc->cpustate_changed = 1; > >> tcg_gen_mov_tl(cpu_PR[r], tn); > >> @@ -241,24 +241,24 @@ static int cris_fetch(DisasContext *dc, uint32_t addr, > >> switch (size) { > >> case 4: > >> { > >> - r = ldl_code(addr); > >> + r = cpu_ldl_code(cpu_single_env, addr); > >> break; > >> } > >> case 2: > >> { > >> if (sign) { > >> - r = ldsw_code(addr); > >> + r = cpu_ldsw_code(cpu_single_env, addr); > >> } else { > >> - r = lduw_code(addr); > >> + r = cpu_lduw_code(cpu_single_env, addr); > >> } > >> break; > >> } > >> case 1: > >> { > >> if (sign) { > >> - r = ldsb_code(addr); > >> + r = cpu_ldsb_code(cpu_single_env, addr); > >> } else { > >> - r = ldub_code(addr); > >> + r = cpu_ldub_code(cpu_single_env, addr); > >> } > >> break; > >> } > >> @@ -278,7 +278,7 @@ static void cris_lock_irq(DisasContext *dc) > >> static inline void t_gen_raise_exception(uint32_t index) > >> { > >> TCGv_i32 tmp = tcg_const_i32(index); > >> - gen_helper_raise_exception(tmp); > >> + gen_helper_raise_exception(cpu_env, tmp); > >> tcg_temp_free_i32(tmp); > >> } > >> > >> @@ -624,17 +624,17 @@ static void cris_evaluate_flags(DisasContext *dc) > >> switch (dc->cc_op) > >> { > >> case CC_OP_MCP: > >> - gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], > >> + gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env, > >> cpu_PR[PR_CCS], cc_src, > >> cc_dest, cc_result); > >> break; > >> case CC_OP_MULS: > >> - gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], > >> + gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], cpu_env, > >> cpu_PR[PR_CCS], cc_result, > >> cpu_PR[PR_MOF]); > >> break; > >> case CC_OP_MULU: > >> - gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], > >> + gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], cpu_env, > >> cpu_PR[PR_CCS], cc_result, > >> cpu_PR[PR_MOF]); > >> break; > >> @@ -648,15 +648,15 @@ static void cris_evaluate_flags(DisasContext *dc) > >> switch (dc->cc_size) > >> { > >> case 4: > >> - gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], > >> + gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS], cpu_env, > >> cpu_PR[PR_CCS], cc_result); > >> break; > >> case 2: > >> - gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], > >> + gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS], cpu_env, > >> cpu_PR[PR_CCS], cc_result); > >> break; > >> default: > >> - gen_helper_evaluate_flags(); > >> + gen_helper_evaluate_flags(cpu_env); > >> break; > >> } > >> break; > >> @@ -666,21 +666,21 @@ static void cris_evaluate_flags(DisasContext *dc) > >> case CC_OP_SUB: > >> case CC_OP_CMP: > >> if (dc->cc_size == 4) > >> - gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], > >> + gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS], cpu_env, > >> cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); > >> else > >> - gen_helper_evaluate_flags(); > >> + gen_helper_evaluate_flags(cpu_env); > >> > >> break; > >> default: > >> switch (dc->cc_size) > >> { > >> case 4: > >> - gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], > >> + gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS], cpu_env, > >> cpu_PR[PR_CCS], cc_src, cc_dest, cc_result); > >> break; > >> default: > >> - gen_helper_evaluate_flags(); > >> + gen_helper_evaluate_flags(cpu_env); > >> break; > >> } > >> break; > >> @@ -1475,7 +1475,7 @@ static int dec_btstq(DisasContext *dc) > >> > >> cris_cc_mask(dc, CC_MASK_NZ); > >> cris_evaluate_flags(dc); > >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], > >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], > >> tcg_const_tl(dc->op1), cpu_PR[PR_CCS]); > >> cris_alu(dc, CC_OP_MOVE, > >> cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op2], 4); > >> @@ -1925,7 +1925,7 @@ static int dec_btst_r(DisasContext *dc) > >> dc->op1, dc->op2); > >> cris_cc_mask(dc, CC_MASK_NZ); > >> cris_evaluate_flags(dc); > >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2], > >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2], > >> cpu_R[dc->op1], cpu_PR[PR_CCS]); > >> cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], > >> cpu_R[dc->op2], cpu_R[dc->op2], 4); > >> @@ -2135,14 +2135,16 @@ static int dec_move_rs(DisasContext *dc) > >> { > >> LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2); > >> cris_cc_mask(dc, 0); > >> - gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1)); > >> + gen_helper_movl_sreg_reg(cpu_env, tcg_const_tl(dc->op2), > >> + tcg_const_tl(dc->op1)); > >> return 2; > >> } > >> static int dec_move_sr(DisasContext *dc) > >> { > >> LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1); > >> cris_cc_mask(dc, 0); > >> - gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); > >> + gen_helper_movl_reg_sreg(cpu_env, tcg_const_tl(dc->op1), > >> + tcg_const_tl(dc->op2)); > >> return 2; > >> } > >> > >> @@ -2906,14 +2908,14 @@ static int dec_rfe_etc(DisasContext *dc) > >> /* rfe. */ > >> LOG_DIS("rfe\n"); > >> cris_evaluate_flags(dc); > >> - gen_helper_rfe(); > >> + gen_helper_rfe(cpu_env); > >> dc->is_jmp = DISAS_UPDATE; > >> break; > >> case 5: > >> /* rfn. */ > >> LOG_DIS("rfn\n"); > >> cris_evaluate_flags(dc); > >> - gen_helper_rfn(); > >> + gen_helper_rfn(cpu_env); > >> dc->is_jmp = DISAS_UPDATE; > >> break; > >> case 6: > >> diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c > >> index 3629629..d9d6aa5 100644 > >> --- a/target-cris/translate_v10.c > >> +++ b/target-cris/translate_v10.c > >> @@ -182,17 +182,17 @@ static int dec10_prep_move_m(DisasContext *dc, int s_ext, int memsize, > >> if (memsize != 4) { > >> if (s_ext) { > >> if (memsize == 1) > >> - imm = ldsb_code(dc->pc + 2); > >> + imm = cpu_ldsb_code(cpu_single_env, dc->pc + 2); > >> else > >> - imm = ldsw_code(dc->pc + 2); > >> + imm = cpu_ldsw_code(cpu_single_env, dc->pc + 2); > >> } else { > >> if (memsize == 1) > >> - imm = ldub_code(dc->pc + 2); > >> + imm = cpu_ldub_code(cpu_single_env, dc->pc + 2); > >> else > >> - imm = lduw_code(dc->pc + 2); > >> + imm = cpu_lduw_code(cpu_single_env, dc->pc + 2); > >> } > >> } else > >> - imm = ldl_code(dc->pc + 2); > >> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2); > >> > >> tcg_gen_movi_tl(dst, imm); > > > > Similarly to what I reported for the microblaze and sh4 target, I think > > we should not start using cpu_single_env (a global variable) to replace > > env (a global variable stored in a register). > > This task could be also taken to a different patch series, because the > conversions committed earlier also used cpu_single_env. > > Eliminating cpu_single_env altogether may be possible but it would > need some refactoring. > > > > > It is possible to pass env through the subroutine, though it is more > > complicated there than for other targets. I have therefore done the work > > and I have attached the two resulting patches to this mail. > > Thank you for the work, the patches look better. I think the patches > should also include my sign-off. No problem. Feel free to add it and take these patches in your series. > > > >> @@ -289,7 +289,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc) > >> } else { > >> /* BTST */ > >> cris_update_cc_op(dc, CC_OP_FLAGS, 4); > >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst], > >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst], > >> tcg_const_tl(imm), cpu_PR[PR_CCS]); > >> } > >> break; > >> @@ -723,7 +723,7 @@ static unsigned int dec10_reg(DisasContext *dc) > >> LOG_DIS("btst $r%d, $r%d sz=%d\n", dc->src, dc->dst, size); > >> cris_cc_mask(dc, CC_MASK_NZVC); > >> cris_update_cc_op(dc, CC_OP_FLAGS, 4); > >> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst], > >> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst], > >> cpu_R[dc->src], cpu_PR[PR_CCS]); > >> break; > >> case CRISV10_REG_DSTEP: > >> @@ -974,7 +974,7 @@ static int dec10_dip(DisasContext *dc) > >> LOG_DIS("dip pc=%x opcode=%d r%d r%d\n", > >> dc->pc, dc->opcode, dc->src, dc->dst); > >> if (dc->src == 15) { > >> - imm = ldl_code(dc->pc + 2); > >> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2); > >> tcg_gen_movi_tl(cpu_PR[PR_PREFIX], imm); > >> if (dc->postinc) > >> insn_len += 4; > >> @@ -1119,7 +1119,7 @@ static unsigned int dec10_ind(DisasContext *dc) > >> if (dc->src == 15) { > >> LOG_DIS("jump.%d %d r%d r%d direct\n", size, > >> dc->opcode, dc->src, dc->dst); > >> - imm = ldl_code(dc->pc + 2); > >> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2); > >> if (dc->mode == CRISV10_MODE_AUTOINC) > >> insn_len += size; > >> > >> @@ -1185,7 +1185,7 @@ static unsigned int dec10_ind(DisasContext *dc) > >> case CRISV10_IND_BCC_M: > >> > >> cris_cc_mask(dc, 0); > >> - imm = ldsw_code(dc->pc + 2); > >> + imm = cpu_ldsw_code(cpu_single_env, dc->pc + 2); > >> simm = (int16_t)imm; > >> simm += 4; > >> > >> @@ -1210,7 +1210,7 @@ static unsigned int crisv10_decoder(DisasContext *dc) > >> tcg_gen_debug_insn_start(dc->pc); > >> > >> /* Load a halfword onto the instruction register. */ > >> - dc->ir = lduw_code(dc->pc); > >> + dc->ir = cpu_lduw_code(cpu_single_env, dc->pc); > >> > >> /* Now decode it. */ > >> dc->opcode = EXTRACT_FIELD(dc->ir, 6, 9); > >> -- > >> 1.7.2.5 > >> > >> > >> > > > > -- > > Aurelien Jarno GPG: 1024D/F1BCDB73 > > aurelien@aurel32.net http://www.aurel32.net > >
From 70308b3e4bed96640f776c679c08b9db07d2fd5f Mon Sep 17 00:00:00 2001 From: Aurelien Jarno <aurelien@aurel32.net> Date: Fri, 7 Sep 2012 16:13:27 +0200 Subject: [PATCH 2/2] target-cris: Switch to AREG0 free mode Add an explicit CPUCRISState parameter instead of relying on AREG0, and use cpu_ld* in translation and interrupt handling. Remove AREG0 swapping in tlb_fill(). Switch to AREG0 free mode Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> --- configure | 2 +- target-cris/Makefile.objs | 2 - target-cris/helper.c | 4 +- target-cris/op_helper.c | 9 +- target-cris/translate.c | 256 +++++++++++++++++++++---------------------- target-cris/translate_v10.c | 95 ++++++++-------- 6 files changed, 181 insertions(+), 187 deletions(-) diff --git a/configure b/configure index e464d2f..34b5f78 100755 --- a/configure +++ b/configure @@ -3829,7 +3829,7 @@ symlink "$source_path/Makefile.target" "$target_dir/Makefile" case "$target_arch2" in - alpha | arm* | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc*) + alpha | arm* | cris | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* | unicore32 | x86_64 | xtensa* | ppc* | ) echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak ;; esac diff --git a/target-cris/Makefile.objs b/target-cris/Makefile.objs index 4b09e8c..afb87bc 100644 --- a/target-cris/Makefile.objs +++ b/target-cris/Makefile.objs @@ -1,4 +1,2 @@ obj-y += translate.o op_helper.o helper.o cpu.o obj-$(CONFIG_SOFTMMU) += mmu.o machine.o - -$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-cris/helper.c b/target-cris/helper.c index bfbc29e..1bdb7e2 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -151,7 +151,7 @@ static void do_interruptv10(CPUCRISState *env) } /* Now that we are in kernel mode, load the handlers address. */ - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); env->locked_irq = 1; env->pregs[PR_CCS] |= F_FLAG_V10; /* set F. */ @@ -233,7 +233,7 @@ void do_interrupt(CPUCRISState *env) /* Now that we are in kernel mode, load the handlers address. This load may not fault, real hw leaves that behaviour as undefined. */ - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4); + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4); /* Clear the excption_index to avoid spurios hw_aborts for recursive bus faults. */ diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c index 5ca85a0..a7468d4 100644 --- a/target-cris/op_helper.c +++ b/target-cris/op_helper.c @@ -19,7 +19,6 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "mmu.h" #include "helper.h" #include "host-utils.h" @@ -55,17 +54,12 @@ /* Try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ -/* XXX: fix it to restore all registers */ -void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, +void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { TranslationBlock *tb; - CPUCRISState *saved_env; int ret; - saved_env = env; - env = env1; - D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__, env->pc, env->debug1, (void *)retaddr); ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx); @@ -84,7 +78,6 @@ void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int mmu_idx, } cpu_loop_exit(env); } - env = saved_env; } #endif diff --git a/target-cris/translate.c b/target-cris/translate.c index d9759fc..add7f83 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -78,7 +78,7 @@ typedef struct DisasContext { target_ulong pc, ppc; /* Decoder. */ - unsigned int (*decoder)(struct DisasContext *dc); + unsigned int (*decoder)(CPUCRISState *env, struct DisasContext *dc); uint32_t ir; uint32_t opcode; unsigned int op1; @@ -233,7 +233,7 @@ static int sign_extend(unsigned int val, unsigned int width) return sval; } -static int cris_fetch(DisasContext *dc, uint32_t addr, +static int cris_fetch(CPUCRISState *env, DisasContext *dc, uint32_t addr, unsigned int size, unsigned int sign) { int r; @@ -241,24 +241,24 @@ static int cris_fetch(DisasContext *dc, uint32_t addr, switch (size) { case 4: { - r = ldl_code(addr); + r = cpu_ldl_code(env, addr); break; } case 2: { if (sign) { - r = ldsw_code(addr); + r = cpu_ldsw_code(env, addr); } else { - r = lduw_code(addr); + r = cpu_lduw_code(env, addr); } break; } case 1: { if (sign) { - r = ldsb_code(addr); + r = cpu_ldsb_code(env, addr); } else { - r = ldub_code(addr); + r = cpu_ldub_code(env, addr); } break; } @@ -1304,8 +1304,8 @@ static void dec_prep_alu_r(DisasContext *dc, int rs, int rd, t_gen_zext(dst, cpu_R[rd], size); } -static int dec_prep_move_m(DisasContext *dc, int s_ext, int memsize, - TCGv dst) +static int dec_prep_move_m(CPUCRISState *env, DisasContext *dc, + int s_ext, int memsize, TCGv dst) { unsigned int rs; uint32_t imm; @@ -1321,7 +1321,7 @@ static int dec_prep_move_m(DisasContext *dc, int s_ext, int memsize, if (memsize == 1) insn_len++; - imm = cris_fetch(dc, dc->pc + 2, memsize, s_ext); + imm = cris_fetch(env, dc, dc->pc + 2, memsize, s_ext); tcg_gen_movi_tl(dst, imm); dc->postinc = 0; } else { @@ -1338,12 +1338,12 @@ static int dec_prep_move_m(DisasContext *dc, int s_ext, int memsize, /* Prepare T0 and T1 for a memory + alu operation. s_ext decides if the operand1 should be sign-extended or zero-extended when needed. */ -static int dec_prep_alu_m(DisasContext *dc, int s_ext, int memsize, - TCGv dst, TCGv src) +static int dec_prep_alu_m(CPUCRISState *env, DisasContext *dc, + int s_ext, int memsize, TCGv dst, TCGv src) { int insn_len; - insn_len = dec_prep_move_m(dc, s_ext, memsize, src); + insn_len = dec_prep_move_m(env, dc, s_ext, memsize, src); tcg_gen_mov_tl(dst, cpu_R[dc->op2]); return insn_len; } @@ -1362,7 +1362,7 @@ static const char *cc_name(int cc) /* Start of insn decoders. */ -static int dec_bccq(DisasContext *dc) +static int dec_bccq(CPUCRISState *env, DisasContext *dc) { int32_t offset; int sign; @@ -1382,7 +1382,7 @@ static int dec_bccq(DisasContext *dc) cris_prepare_cc_branch (dc, offset, cond); return 2; } -static int dec_addoq(DisasContext *dc) +static int dec_addoq(CPUCRISState *env, DisasContext *dc) { int32_t imm; @@ -1396,7 +1396,7 @@ static int dec_addoq(DisasContext *dc) return 2; } -static int dec_addq(DisasContext *dc) +static int dec_addq(CPUCRISState *env, DisasContext *dc) { LOG_DIS("addq %u, $r%u\n", dc->op1, dc->op2); @@ -1408,7 +1408,7 @@ static int dec_addq(DisasContext *dc) cpu_R[dc->op2], cpu_R[dc->op2], tcg_const_tl(dc->op1), 4); return 2; } -static int dec_moveq(DisasContext *dc) +static int dec_moveq(CPUCRISState *env, DisasContext *dc) { uint32_t imm; @@ -1419,7 +1419,7 @@ static int dec_moveq(DisasContext *dc) tcg_gen_movi_tl(cpu_R[dc->op2], imm); return 2; } -static int dec_subq(DisasContext *dc) +static int dec_subq(CPUCRISState *env, DisasContext *dc) { dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5); @@ -1430,7 +1430,7 @@ static int dec_subq(DisasContext *dc) cpu_R[dc->op2], cpu_R[dc->op2], tcg_const_tl(dc->op1), 4); return 2; } -static int dec_cmpq(DisasContext *dc) +static int dec_cmpq(CPUCRISState *env, DisasContext *dc) { uint32_t imm; dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5); @@ -1443,7 +1443,7 @@ static int dec_cmpq(DisasContext *dc) cpu_R[dc->op2], cpu_R[dc->op2], tcg_const_tl(imm), 4); return 2; } -static int dec_andq(DisasContext *dc) +static int dec_andq(CPUCRISState *env, DisasContext *dc) { uint32_t imm; dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5); @@ -1456,7 +1456,7 @@ static int dec_andq(DisasContext *dc) cpu_R[dc->op2], cpu_R[dc->op2], tcg_const_tl(imm), 4); return 2; } -static int dec_orq(DisasContext *dc) +static int dec_orq(CPUCRISState *env, DisasContext *dc) { uint32_t imm; dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5); @@ -1468,7 +1468,7 @@ static int dec_orq(DisasContext *dc) cpu_R[dc->op2], cpu_R[dc->op2], tcg_const_tl(imm), 4); return 2; } -static int dec_btstq(DisasContext *dc) +static int dec_btstq(CPUCRISState *env, DisasContext *dc) { dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4); LOG_DIS("btstq %u, $r%d\n", dc->op1, dc->op2); @@ -1483,7 +1483,7 @@ static int dec_btstq(DisasContext *dc) dc->flags_uptodate = 1; return 2; } -static int dec_asrq(DisasContext *dc) +static int dec_asrq(CPUCRISState *env, DisasContext *dc) { dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4); LOG_DIS("asrq %u, $r%d\n", dc->op1, dc->op2); @@ -1495,7 +1495,7 @@ static int dec_asrq(DisasContext *dc) cpu_R[dc->op2], cpu_R[dc->op2], 4); return 2; } -static int dec_lslq(DisasContext *dc) +static int dec_lslq(CPUCRISState *env, DisasContext *dc) { dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4); LOG_DIS("lslq %u, $r%d\n", dc->op1, dc->op2); @@ -1509,7 +1509,7 @@ static int dec_lslq(DisasContext *dc) cpu_R[dc->op2], cpu_R[dc->op2], 4); return 2; } -static int dec_lsrq(DisasContext *dc) +static int dec_lsrq(CPUCRISState *env, DisasContext *dc) { dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4); LOG_DIS("lsrq %u, $r%d\n", dc->op1, dc->op2); @@ -1523,7 +1523,7 @@ static int dec_lsrq(DisasContext *dc) return 2; } -static int dec_move_r(DisasContext *dc) +static int dec_move_r(CPUCRISState *env, DisasContext *dc) { int size = memsize_zz(dc); @@ -1551,7 +1551,7 @@ static int dec_move_r(DisasContext *dc) return 2; } -static int dec_scc_r(DisasContext *dc) +static int dec_scc_r(CPUCRISState *env, DisasContext *dc) { int cond = dc->op2; @@ -1594,7 +1594,7 @@ static inline void cris_alu_free_temps(DisasContext *dc, int size, TCGv *t) } } -static int dec_and_r(DisasContext *dc) +static int dec_and_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1611,7 +1611,7 @@ static int dec_and_r(DisasContext *dc) return 2; } -static int dec_lz_r(DisasContext *dc) +static int dec_lz_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; LOG_DIS("lz $r%u, $r%u\n", @@ -1624,7 +1624,7 @@ static int dec_lz_r(DisasContext *dc) return 2; } -static int dec_lsl_r(DisasContext *dc) +static int dec_lsl_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1641,7 +1641,7 @@ static int dec_lsl_r(DisasContext *dc) return 2; } -static int dec_lsr_r(DisasContext *dc) +static int dec_lsr_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1658,7 +1658,7 @@ static int dec_lsr_r(DisasContext *dc) return 2; } -static int dec_asr_r(DisasContext *dc) +static int dec_asr_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1675,7 +1675,7 @@ static int dec_asr_r(DisasContext *dc) return 2; } -static int dec_muls_r(DisasContext *dc) +static int dec_muls_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1691,7 +1691,7 @@ static int dec_muls_r(DisasContext *dc) return 2; } -static int dec_mulu_r(DisasContext *dc) +static int dec_mulu_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1708,7 +1708,7 @@ static int dec_mulu_r(DisasContext *dc) } -static int dec_dstep_r(DisasContext *dc) +static int dec_dstep_r(CPUCRISState *env, DisasContext *dc) { LOG_DIS("dstep $r%u, $r%u\n", dc->op1, dc->op2); cris_cc_mask(dc, CC_MASK_NZ); @@ -1717,7 +1717,7 @@ static int dec_dstep_r(DisasContext *dc) return 2; } -static int dec_xor_r(DisasContext *dc) +static int dec_xor_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1733,7 +1733,7 @@ static int dec_xor_r(DisasContext *dc) return 2; } -static int dec_bound_r(DisasContext *dc) +static int dec_bound_r(CPUCRISState *env, DisasContext *dc) { TCGv l0; int size = memsize_zz(dc); @@ -1747,7 +1747,7 @@ static int dec_bound_r(DisasContext *dc) return 2; } -static int dec_cmp_r(DisasContext *dc) +static int dec_cmp_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1762,7 +1762,7 @@ static int dec_cmp_r(DisasContext *dc) return 2; } -static int dec_abs_r(DisasContext *dc) +static int dec_abs_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; @@ -1781,7 +1781,7 @@ static int dec_abs_r(DisasContext *dc) return 2; } -static int dec_add_r(DisasContext *dc) +static int dec_add_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1796,7 +1796,7 @@ static int dec_add_r(DisasContext *dc) return 2; } -static int dec_addc_r(DisasContext *dc) +static int dec_addc_r(CPUCRISState *env, DisasContext *dc) { LOG_DIS("addc $r%u, $r%u\n", dc->op1, dc->op2); @@ -1811,7 +1811,7 @@ static int dec_addc_r(DisasContext *dc) return 2; } -static int dec_mcp_r(DisasContext *dc) +static int dec_mcp_r(CPUCRISState *env, DisasContext *dc) { LOG_DIS("mcp $p%u, $r%u\n", dc->op2, dc->op1); @@ -1838,7 +1838,7 @@ static char * swapmode_name(int mode, char *modename) { } #endif -static int dec_swap_r(DisasContext *dc) +static int dec_swap_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; #if DISAS_CRIS @@ -1864,7 +1864,7 @@ static int dec_swap_r(DisasContext *dc) return 2; } -static int dec_or_r(DisasContext *dc) +static int dec_or_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1878,7 +1878,7 @@ static int dec_or_r(DisasContext *dc) return 2; } -static int dec_addi_r(DisasContext *dc) +static int dec_addi_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; LOG_DIS("addi.%c $r%u, $r%u\n", @@ -1891,7 +1891,7 @@ static int dec_addi_r(DisasContext *dc) return 2; } -static int dec_addi_acr(DisasContext *dc) +static int dec_addi_acr(CPUCRISState *env, DisasContext *dc) { TCGv t0; LOG_DIS("addi.%c $r%u, $r%u, $acr\n", @@ -1904,7 +1904,7 @@ static int dec_addi_acr(DisasContext *dc) return 2; } -static int dec_neg_r(DisasContext *dc) +static int dec_neg_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1919,7 +1919,7 @@ static int dec_neg_r(DisasContext *dc) return 2; } -static int dec_btst_r(DisasContext *dc) +static int dec_btst_r(CPUCRISState *env, DisasContext *dc) { LOG_DIS("btst $r%u, $r%u\n", dc->op1, dc->op2); @@ -1934,7 +1934,7 @@ static int dec_btst_r(DisasContext *dc) return 2; } -static int dec_sub_r(DisasContext *dc) +static int dec_sub_r(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int size = memsize_zz(dc); @@ -1949,7 +1949,7 @@ static int dec_sub_r(DisasContext *dc) } /* Zero extension. From size to dword. */ -static int dec_movu_r(DisasContext *dc) +static int dec_movu_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; int size = memsize_z(dc); @@ -1966,7 +1966,7 @@ static int dec_movu_r(DisasContext *dc) } /* Sign extension. From size to dword. */ -static int dec_movs_r(DisasContext *dc) +static int dec_movs_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; int size = memsize_z(dc); @@ -1985,7 +1985,7 @@ static int dec_movs_r(DisasContext *dc) } /* zero extension. From size to dword. */ -static int dec_addu_r(DisasContext *dc) +static int dec_addu_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; int size = memsize_z(dc); @@ -2004,7 +2004,7 @@ static int dec_addu_r(DisasContext *dc) } /* Sign extension. From size to dword. */ -static int dec_adds_r(DisasContext *dc) +static int dec_adds_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; int size = memsize_z(dc); @@ -2023,7 +2023,7 @@ static int dec_adds_r(DisasContext *dc) } /* Zero extension. From size to dword. */ -static int dec_subu_r(DisasContext *dc) +static int dec_subu_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; int size = memsize_z(dc); @@ -2042,7 +2042,7 @@ static int dec_subu_r(DisasContext *dc) } /* Sign extension. From size to dword. */ -static int dec_subs_r(DisasContext *dc) +static int dec_subs_r(CPUCRISState *env, DisasContext *dc) { TCGv t0; int size = memsize_z(dc); @@ -2060,7 +2060,7 @@ static int dec_subs_r(DisasContext *dc) return 2; } -static int dec_setclrf(DisasContext *dc) +static int dec_setclrf(CPUCRISState *env, DisasContext *dc) { uint32_t flags; int set = (~dc->opcode >> 2) & 1; @@ -2131,7 +2131,7 @@ static int dec_setclrf(DisasContext *dc) return 2; } -static int dec_move_rs(DisasContext *dc) +static int dec_move_rs(CPUCRISState *env, DisasContext *dc) { LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2); cris_cc_mask(dc, 0); @@ -2139,7 +2139,7 @@ static int dec_move_rs(DisasContext *dc) tcg_const_tl(dc->op1)); return 2; } -static int dec_move_sr(DisasContext *dc) +static int dec_move_sr(CPUCRISState *env, DisasContext *dc) { LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1); cris_cc_mask(dc, 0); @@ -2148,7 +2148,7 @@ static int dec_move_sr(DisasContext *dc) return 2; } -static int dec_move_rp(DisasContext *dc) +static int dec_move_rp(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; LOG_DIS("move $r%u, $p%u\n", dc->op1, dc->op2); @@ -2178,7 +2178,7 @@ static int dec_move_rp(DisasContext *dc) tcg_temp_free(t[0]); return 2; } -static int dec_move_pr(DisasContext *dc) +static int dec_move_pr(CPUCRISState *env, DisasContext *dc) { TCGv t0; LOG_DIS("move $p%u, $r%u\n", dc->op2, dc->op1); @@ -2200,7 +2200,7 @@ static int dec_move_pr(DisasContext *dc) return 2; } -static int dec_move_mr(DisasContext *dc) +static int dec_move_mr(CPUCRISState *env, DisasContext *dc) { int memsize = memsize_zz(dc); int insn_len; @@ -2210,7 +2210,7 @@ static int dec_move_mr(DisasContext *dc) dc->op2); if (memsize == 4) { - insn_len = dec_prep_move_m(dc, 0, 4, cpu_R[dc->op2]); + insn_len = dec_prep_move_m(env, dc, 0, 4, cpu_R[dc->op2]); cris_cc_mask(dc, CC_MASK_NZ); cris_update_cc_op(dc, CC_OP_MOVE, 4); cris_update_cc_x(dc); @@ -2220,7 +2220,7 @@ static int dec_move_mr(DisasContext *dc) TCGv t0; t0 = tcg_temp_new(); - insn_len = dec_prep_move_m(dc, 0, memsize, t0); + insn_len = dec_prep_move_m(env, dc, 0, memsize, t0); cris_cc_mask(dc, CC_MASK_NZ); cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], cpu_R[dc->op2], t0, memsize); @@ -2242,7 +2242,7 @@ static inline void cris_alu_m_free_temps(TCGv *t) tcg_temp_free(t[1]); } -static int dec_movs_m(DisasContext *dc) +static int dec_movs_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2254,7 +2254,7 @@ static int dec_movs_m(DisasContext *dc) cris_alu_m_alloc_temps(t); /* sign extend. */ - insn_len = dec_prep_alu_m(dc, 1, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 1, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZ); cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], cpu_R[dc->op2], t[1], 4); @@ -2263,7 +2263,7 @@ static int dec_movs_m(DisasContext *dc) return insn_len; } -static int dec_addu_m(DisasContext *dc) +static int dec_addu_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2275,7 +2275,7 @@ static int dec_addu_m(DisasContext *dc) cris_alu_m_alloc_temps(t); /* sign extend. */ - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_ADD, cpu_R[dc->op2], cpu_R[dc->op2], t[1], 4); @@ -2284,7 +2284,7 @@ static int dec_addu_m(DisasContext *dc) return insn_len; } -static int dec_adds_m(DisasContext *dc) +static int dec_adds_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2296,7 +2296,7 @@ static int dec_adds_m(DisasContext *dc) cris_alu_m_alloc_temps(t); /* sign extend. */ - insn_len = dec_prep_alu_m(dc, 1, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 1, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_ADD, cpu_R[dc->op2], cpu_R[dc->op2], t[1], 4); do_postinc(dc, memsize); @@ -2304,7 +2304,7 @@ static int dec_adds_m(DisasContext *dc) return insn_len; } -static int dec_subu_m(DisasContext *dc) +static int dec_subu_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2316,7 +2316,7 @@ static int dec_subu_m(DisasContext *dc) cris_alu_m_alloc_temps(t); /* sign extend. */ - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_SUB, cpu_R[dc->op2], cpu_R[dc->op2], t[1], 4); do_postinc(dc, memsize); @@ -2324,7 +2324,7 @@ static int dec_subu_m(DisasContext *dc) return insn_len; } -static int dec_subs_m(DisasContext *dc) +static int dec_subs_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2336,7 +2336,7 @@ static int dec_subs_m(DisasContext *dc) cris_alu_m_alloc_temps(t); /* sign extend. */ - insn_len = dec_prep_alu_m(dc, 1, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 1, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_SUB, cpu_R[dc->op2], cpu_R[dc->op2], t[1], 4); do_postinc(dc, memsize); @@ -2344,7 +2344,7 @@ static int dec_subs_m(DisasContext *dc) return insn_len; } -static int dec_movu_m(DisasContext *dc) +static int dec_movu_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2356,7 +2356,7 @@ static int dec_movu_m(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZ); cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2], cpu_R[dc->op2], t[1], 4); do_postinc(dc, memsize); @@ -2364,7 +2364,7 @@ static int dec_movu_m(DisasContext *dc) return insn_len; } -static int dec_cmpu_m(DisasContext *dc) +static int dec_cmpu_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2375,7 +2375,7 @@ static int dec_cmpu_m(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_CMP, cpu_R[dc->op2], cpu_R[dc->op2], t[1], 4); do_postinc(dc, memsize); @@ -2383,7 +2383,7 @@ static int dec_cmpu_m(DisasContext *dc) return insn_len; } -static int dec_cmps_m(DisasContext *dc) +static int dec_cmps_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_z(dc); @@ -2394,7 +2394,7 @@ static int dec_cmps_m(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 1, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 1, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_CMP, cpu_R[dc->op2], cpu_R[dc->op2], t[1], @@ -2404,7 +2404,7 @@ static int dec_cmps_m(DisasContext *dc) return insn_len; } -static int dec_cmp_m(DisasContext *dc) +static int dec_cmp_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2415,7 +2415,7 @@ static int dec_cmp_m(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_CMP, cpu_R[dc->op2], cpu_R[dc->op2], t[1], @@ -2425,7 +2425,7 @@ static int dec_cmp_m(DisasContext *dc) return insn_len; } -static int dec_test_m(DisasContext *dc) +static int dec_test_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2438,7 +2438,7 @@ static int dec_test_m(DisasContext *dc) cris_evaluate_flags(dc); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZ); tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~3); @@ -2449,7 +2449,7 @@ static int dec_test_m(DisasContext *dc) return insn_len; } -static int dec_and_m(DisasContext *dc) +static int dec_and_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2460,7 +2460,7 @@ static int dec_and_m(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZ); cris_alu(dc, CC_OP_AND, cpu_R[dc->op2], t[0], t[1], memsize_zz(dc)); do_postinc(dc, memsize); @@ -2468,7 +2468,7 @@ static int dec_and_m(DisasContext *dc) return insn_len; } -static int dec_add_m(DisasContext *dc) +static int dec_add_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2479,7 +2479,7 @@ static int dec_add_m(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_ADD, cpu_R[dc->op2], t[0], t[1], memsize_zz(dc)); @@ -2488,7 +2488,7 @@ static int dec_add_m(DisasContext *dc) return insn_len; } -static int dec_addo_m(DisasContext *dc) +static int dec_addo_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2499,7 +2499,7 @@ static int dec_addo_m(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 1, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 1, memsize, t[0], t[1]); cris_cc_mask(dc, 0); cris_alu(dc, CC_OP_ADD, cpu_R[R_ACR], t[0], t[1], 4); do_postinc(dc, memsize); @@ -2507,7 +2507,7 @@ static int dec_addo_m(DisasContext *dc) return insn_len; } -static int dec_bound_m(DisasContext *dc) +static int dec_bound_m(CPUCRISState *env, DisasContext *dc) { TCGv l[2]; int memsize = memsize_zz(dc); @@ -2519,7 +2519,7 @@ static int dec_bound_m(DisasContext *dc) l[0] = tcg_temp_local_new(); l[1] = tcg_temp_local_new(); - insn_len = dec_prep_alu_m(dc, 0, memsize, l[0], l[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, l[0], l[1]); cris_cc_mask(dc, CC_MASK_NZ); cris_alu(dc, CC_OP_BOUND, cpu_R[dc->op2], l[0], l[1], 4); do_postinc(dc, memsize); @@ -2528,7 +2528,7 @@ static int dec_bound_m(DisasContext *dc) return insn_len; } -static int dec_addc_mr(DisasContext *dc) +static int dec_addc_mr(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int insn_len = 2; @@ -2543,7 +2543,7 @@ static int dec_addc_mr(DisasContext *dc) dc->flags_x = X_FLAG; cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, 4, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, 4, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_ADDC, cpu_R[dc->op2], t[0], t[1], 4); do_postinc(dc, 4); @@ -2551,7 +2551,7 @@ static int dec_addc_mr(DisasContext *dc) return insn_len; } -static int dec_sub_m(DisasContext *dc) +static int dec_sub_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2562,7 +2562,7 @@ static int dec_sub_m(DisasContext *dc) dc->op2, dc->ir, dc->zzsize); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu(dc, CC_OP_SUB, cpu_R[dc->op2], t[0], t[1], memsize); do_postinc(dc, memsize); @@ -2570,7 +2570,7 @@ static int dec_sub_m(DisasContext *dc) return insn_len; } -static int dec_or_m(DisasContext *dc) +static int dec_or_m(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2581,7 +2581,7 @@ static int dec_or_m(DisasContext *dc) dc->op2, dc->pc); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, CC_MASK_NZ); cris_alu(dc, CC_OP_OR, cpu_R[dc->op2], t[0], t[1], memsize_zz(dc)); @@ -2590,7 +2590,7 @@ static int dec_or_m(DisasContext *dc) return insn_len; } -static int dec_move_mp(DisasContext *dc) +static int dec_move_mp(CPUCRISState *env, DisasContext *dc) { TCGv t[2]; int memsize = memsize_zz(dc); @@ -2603,7 +2603,7 @@ static int dec_move_mp(DisasContext *dc) dc->op2); cris_alu_m_alloc_temps(t); - insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]); + insn_len = dec_prep_alu_m(env, dc, 0, memsize, t[0], t[1]); cris_cc_mask(dc, 0); if (dc->op2 == PR_CCS) { cris_evaluate_flags(dc); @@ -2622,7 +2622,7 @@ static int dec_move_mp(DisasContext *dc) return insn_len; } -static int dec_move_pm(DisasContext *dc) +static int dec_move_pm(CPUCRISState *env, DisasContext *dc) { TCGv t0; int memsize; @@ -2648,7 +2648,7 @@ static int dec_move_pm(DisasContext *dc) return 2; } -static int dec_movem_mr(DisasContext *dc) +static int dec_movem_mr(CPUCRISState *env, DisasContext *dc) { TCGv_i64 tmp[16]; TCGv tmp32; @@ -2695,7 +2695,7 @@ static int dec_movem_mr(DisasContext *dc) return 2; } -static int dec_movem_rm(DisasContext *dc) +static int dec_movem_rm(CPUCRISState *env, DisasContext *dc) { TCGv tmp; TCGv addr; @@ -2724,7 +2724,7 @@ static int dec_movem_rm(DisasContext *dc) return 2; } -static int dec_move_rm(DisasContext *dc) +static int dec_move_rm(CPUCRISState *env, DisasContext *dc) { int memsize; @@ -2743,7 +2743,7 @@ static int dec_move_rm(DisasContext *dc) return 2; } -static int dec_lapcq(DisasContext *dc) +static int dec_lapcq(CPUCRISState *env, DisasContext *dc) { LOG_DIS("lapcq %x, $r%u\n", dc->pc + dc->op1*2, dc->op2); @@ -2752,7 +2752,7 @@ static int dec_lapcq(DisasContext *dc) return 2; } -static int dec_lapc_im(DisasContext *dc) +static int dec_lapc_im(CPUCRISState *env, DisasContext *dc) { unsigned int rd; int32_t imm; @@ -2761,7 +2761,7 @@ static int dec_lapc_im(DisasContext *dc) rd = dc->op2; cris_cc_mask(dc, 0); - imm = cris_fetch(dc, dc->pc + 2, 4, 0); + imm = cris_fetch(env, dc, dc->pc + 2, 4, 0); LOG_DIS("lapc 0x%x, $r%u\n", imm + dc->pc, dc->op2); pc = dc->pc; @@ -2771,7 +2771,7 @@ static int dec_lapc_im(DisasContext *dc) } /* Jump to special reg. */ -static int dec_jump_p(DisasContext *dc) +static int dec_jump_p(CPUCRISState *env, DisasContext *dc) { LOG_DIS("jump $p%u\n", dc->op2); @@ -2786,7 +2786,7 @@ static int dec_jump_p(DisasContext *dc) } /* Jump and save. */ -static int dec_jas_r(DisasContext *dc) +static int dec_jas_r(CPUCRISState *env, DisasContext *dc) { LOG_DIS("jas $r%u, $p%u\n", dc->op1, dc->op2); cris_cc_mask(dc, 0); @@ -2800,11 +2800,11 @@ static int dec_jas_r(DisasContext *dc) return 2; } -static int dec_jas_im(DisasContext *dc) +static int dec_jas_im(CPUCRISState *env, DisasContext *dc) { uint32_t imm; - imm = cris_fetch(dc, dc->pc + 2, 4, 0); + imm = cris_fetch(env, dc, dc->pc + 2, 4, 0); LOG_DIS("jas 0x%x\n", imm); cris_cc_mask(dc, 0); @@ -2816,11 +2816,11 @@ static int dec_jas_im(DisasContext *dc) return 6; } -static int dec_jasc_im(DisasContext *dc) +static int dec_jasc_im(CPUCRISState *env, DisasContext *dc) { uint32_t imm; - imm = cris_fetch(dc, dc->pc + 2, 4, 0); + imm = cris_fetch(env, dc, dc->pc + 2, 4, 0); LOG_DIS("jasc 0x%x\n", imm); cris_cc_mask(dc, 0); @@ -2832,7 +2832,7 @@ static int dec_jasc_im(DisasContext *dc) return 6; } -static int dec_jasc_r(DisasContext *dc) +static int dec_jasc_r(CPUCRISState *env, DisasContext *dc) { LOG_DIS("jasc_r $r%u, $p%u\n", dc->op1, dc->op2); cris_cc_mask(dc, 0); @@ -2843,12 +2843,12 @@ static int dec_jasc_r(DisasContext *dc) return 2; } -static int dec_bcc_im(DisasContext *dc) +static int dec_bcc_im(CPUCRISState *env, DisasContext *dc) { int32_t offset; uint32_t cond = dc->op2; - offset = cris_fetch(dc, dc->pc + 2, 2, 1); + offset = cris_fetch(env, dc, dc->pc + 2, 2, 1); LOG_DIS("b%s %d pc=%x dst=%x\n", cc_name(cond), offset, @@ -2860,12 +2860,12 @@ static int dec_bcc_im(DisasContext *dc) return 4; } -static int dec_bas_im(DisasContext *dc) +static int dec_bas_im(CPUCRISState *env, DisasContext *dc) { int32_t simm; - simm = cris_fetch(dc, dc->pc + 2, 4, 0); + simm = cris_fetch(env, dc, dc->pc + 2, 4, 0); LOG_DIS("bas 0x%x, $p%u\n", dc->pc + simm, dc->op2); cris_cc_mask(dc, 0); @@ -2877,10 +2877,10 @@ static int dec_bas_im(DisasContext *dc) return 6; } -static int dec_basc_im(DisasContext *dc) +static int dec_basc_im(CPUCRISState *env, DisasContext *dc) { int32_t simm; - simm = cris_fetch(dc, dc->pc + 2, 4, 0); + simm = cris_fetch(env, dc, dc->pc + 2, 4, 0); LOG_DIS("basc 0x%x, $p%u\n", dc->pc + simm, dc->op2); cris_cc_mask(dc, 0); @@ -2892,7 +2892,7 @@ static int dec_basc_im(DisasContext *dc) return 6; } -static int dec_rfe_etc(DisasContext *dc) +static int dec_rfe_etc(CPUCRISState *env, DisasContext *dc) { cris_cc_mask(dc, 0); @@ -2939,17 +2939,17 @@ static int dec_rfe_etc(DisasContext *dc) return 2; } -static int dec_ftag_fidx_d_m(DisasContext *dc) +static int dec_ftag_fidx_d_m(CPUCRISState *env, DisasContext *dc) { return 2; } -static int dec_ftag_fidx_i_m(DisasContext *dc) +static int dec_ftag_fidx_i_m(CPUCRISState *env, DisasContext *dc) { return 2; } -static int dec_null(DisasContext *dc) +static int dec_null(CPUCRISState *env, DisasContext *dc) { printf ("unknown insn pc=%x opc=%x op1=%x op2=%x\n", dc->pc, dc->opcode, dc->op1, dc->op2); @@ -2963,7 +2963,7 @@ static struct decoder_info { uint32_t bits; uint32_t mask; }; - int (*dec)(DisasContext *dc); + int (*dec)(CPUCRISState *env, DisasContext *dc); } decinfo[] = { /* Order matters here. */ {DEC_MOVEQ, dec_moveq}, @@ -3069,7 +3069,7 @@ static struct decoder_info { {{0, 0}, dec_null} }; -static unsigned int crisv32_decoder(DisasContext *dc) +static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) { int insn_len = 2; int i; @@ -3078,7 +3078,7 @@ static unsigned int crisv32_decoder(DisasContext *dc) tcg_gen_debug_insn_start(dc->pc); /* Load a halfword onto the instruction register. */ - dc->ir = cris_fetch(dc, dc->pc, 2, 0); + dc->ir = cris_fetch(env, dc, dc->pc, 2, 0); /* Now decode it. */ dc->opcode = EXTRACT_FIELD(dc->ir, 4, 11); @@ -3092,7 +3092,7 @@ static unsigned int crisv32_decoder(DisasContext *dc) for (i = 0; i < ARRAY_SIZE(decinfo); i++) { if ((dc->opcode & decinfo[i].mask) == decinfo[i].bits) { - insn_len = decinfo[i].dec(dc); + insn_len = decinfo[i].dec(env, dc); break; } } @@ -3286,7 +3286,7 @@ gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb, gen_io_start(); dc->clear_x = 1; - insn_len = dc->decoder(dc); + insn_len = dc->decoder(env, dc); dc->ppc = dc->pc; dc->pc += insn_len; if (dc->clear_x) diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 9a39c6a..d2cca89 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -164,8 +164,8 @@ static unsigned int crisv10_post_memaddr(DisasContext *dc, unsigned int size) return insn_len; } -static int dec10_prep_move_m(DisasContext *dc, int s_ext, int memsize, - TCGv dst) +static int dec10_prep_move_m(CPUCRISState *env, DisasContext *dc, + int s_ext, int memsize, TCGv dst) { unsigned int rs; uint32_t imm; @@ -182,17 +182,17 @@ static int dec10_prep_move_m(DisasContext *dc, int s_ext, int memsize, if (memsize != 4) { if (s_ext) { if (memsize == 1) - imm = ldsb_code(dc->pc + 2); + imm = cpu_ldsb_code(env, dc->pc + 2); else - imm = ldsw_code(dc->pc + 2); + imm = cpu_ldsw_code(env, dc->pc + 2); } else { if (memsize == 1) - imm = ldub_code(dc->pc + 2); + imm = cpu_ldub_code(env, dc->pc + 2); else - imm = lduw_code(dc->pc + 2); + imm = cpu_lduw_code(env, dc->pc + 2); } } else - imm = ldl_code(dc->pc + 2); + imm = cpu_ldl_code(env, dc->pc + 2); tcg_gen_movi_tl(dst, imm); @@ -752,7 +752,8 @@ static unsigned int dec10_reg(DisasContext *dc) return insn_len; } -static unsigned int dec10_ind_move_m_r(DisasContext *dc, unsigned int size) +static unsigned int dec10_ind_move_m_r(CPUCRISState *env, DisasContext *dc, + unsigned int size) { unsigned int insn_len = 2; TCGv t; @@ -762,7 +763,7 @@ static unsigned int dec10_ind_move_m_r(DisasContext *dc, unsigned int size) cris_cc_mask(dc, CC_MASK_NZVC); t = tcg_temp_new(); - insn_len += dec10_prep_move_m(dc, 0, size, t); + insn_len += dec10_prep_move_m(env, dc, 0, size, t); cris_alu(dc, CC_OP_MOVE, cpu_R[dc->dst], cpu_R[dc->dst], t, size); if (dc->dst == 15) { tcg_gen_mov_tl(env_btarget, cpu_R[dc->dst]); @@ -789,7 +790,7 @@ static unsigned int dec10_ind_move_r_m(DisasContext *dc, unsigned int size) return insn_len; } -static unsigned int dec10_ind_move_m_pr(DisasContext *dc) +static unsigned int dec10_ind_move_m_pr(CPUCRISState *env, DisasContext *dc) { unsigned int insn_len = 2, rd = dc->dst; TCGv t, addr; @@ -799,7 +800,7 @@ static unsigned int dec10_ind_move_m_pr(DisasContext *dc) addr = tcg_temp_new(); t = tcg_temp_new(); - insn_len += dec10_prep_move_m(dc, 0, 4, t); + insn_len += dec10_prep_move_m(env, dc, 0, 4, t); if (rd == 15) { tcg_gen_mov_tl(env_btarget, t); cris_prepare_jmp(dc, JMP_INDIRECT); @@ -899,14 +900,15 @@ static void dec10_movem_m_r(DisasContext *dc) tcg_temp_free(t0); } -static int dec10_ind_alu(DisasContext *dc, int op, unsigned int size) +static int dec10_ind_alu(CPUCRISState *env, DisasContext *dc, + int op, unsigned int size) { int insn_len = 0; int rd = dc->dst; TCGv t[2]; cris_alu_m_alloc_temps(t); - insn_len += dec10_prep_move_m(dc, 0, size, t[0]); + insn_len += dec10_prep_move_m(env, dc, 0, size, t[0]); cris_alu(dc, op, cpu_R[dc->dst], cpu_R[rd], t[0], size); if (dc->dst == 15) { tcg_gen_mov_tl(env_btarget, cpu_R[dc->dst]); @@ -920,14 +922,15 @@ static int dec10_ind_alu(DisasContext *dc, int op, unsigned int size) return insn_len; } -static int dec10_ind_bound(DisasContext *dc, unsigned int size) +static int dec10_ind_bound(CPUCRISState *env, DisasContext *dc, + unsigned int size) { int insn_len = 0; int rd = dc->dst; TCGv t; t = tcg_temp_local_new(); - insn_len += dec10_prep_move_m(dc, 0, size, t); + insn_len += dec10_prep_move_m(env, dc, 0, size, t); cris_alu(dc, CC_OP_BOUND, cpu_R[dc->dst], cpu_R[rd], t, 4); if (dc->dst == 15) { tcg_gen_mov_tl(env_btarget, cpu_R[dc->dst]); @@ -940,7 +943,7 @@ static int dec10_ind_bound(DisasContext *dc, unsigned int size) return insn_len; } -static int dec10_alux_m(DisasContext *dc, int op) +static int dec10_alux_m(CPUCRISState *env, DisasContext *dc, int op) { unsigned int size = (dc->size & 1) ? 2 : 1; unsigned int sx = !!(dc->size & 2); @@ -953,7 +956,7 @@ static int dec10_alux_m(DisasContext *dc, int op) t = tcg_temp_new(); cris_cc_mask(dc, CC_MASK_NZVC); - insn_len += dec10_prep_move_m(dc, sx, size, t); + insn_len += dec10_prep_move_m(env, dc, sx, size, t); cris_alu(dc, op, cpu_R[dc->dst], cpu_R[rd], t, 4); if (dc->dst == 15) { tcg_gen_mov_tl(env_btarget, cpu_R[dc->dst]); @@ -966,7 +969,7 @@ static int dec10_alux_m(DisasContext *dc, int op) return insn_len; } -static int dec10_dip(DisasContext *dc) +static int dec10_dip(CPUCRISState *env, DisasContext *dc) { int insn_len = 2; uint32_t imm; @@ -974,7 +977,7 @@ static int dec10_dip(DisasContext *dc) LOG_DIS("dip pc=%x opcode=%d r%d r%d\n", dc->pc, dc->opcode, dc->src, dc->dst); if (dc->src == 15) { - imm = ldl_code(dc->pc + 2); + imm = cpu_ldl_code(env, dc->pc + 2); tcg_gen_movi_tl(cpu_PR[PR_PREFIX], imm); if (dc->postinc) insn_len += 4; @@ -989,7 +992,7 @@ static int dec10_dip(DisasContext *dc) return insn_len; } -static int dec10_bdap_m(DisasContext *dc, int size) +static int dec10_bdap_m(CPUCRISState *env, DisasContext *dc, int size) { int insn_len = 2; int rd = dc->dst; @@ -1014,13 +1017,13 @@ static int dec10_bdap_m(DisasContext *dc, int size) } #endif /* Now the rest of the modes are truly indirect. */ - insn_len += dec10_prep_move_m(dc, 1, size, cpu_PR[PR_PREFIX]); + insn_len += dec10_prep_move_m(env, dc, 1, size, cpu_PR[PR_PREFIX]); tcg_gen_add_tl(cpu_PR[PR_PREFIX], cpu_PR[PR_PREFIX], cpu_R[rd]); cris_set_prefix(dc); return insn_len; } -static unsigned int dec10_ind(DisasContext *dc) +static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc) { unsigned int insn_len = 2; unsigned int size = dec10_size(dc->size); @@ -1031,7 +1034,7 @@ static unsigned int dec10_ind(DisasContext *dc) if (dc->size != 3) { switch (dc->opcode) { case CRISV10_IND_MOVE_M_R: - return dec10_ind_move_m_r(dc, size); + return dec10_ind_move_m_r(env, dc, size); break; case CRISV10_IND_MOVE_R_M: return dec10_ind_move_r_m(dc, size); @@ -1039,7 +1042,7 @@ static unsigned int dec10_ind(DisasContext *dc) case CRISV10_IND_CMP: LOG_DIS("cmp size=%d op=%d %d\n", size, dc->src, dc->dst); cris_cc_mask(dc, CC_MASK_NZVC); - insn_len += dec10_ind_alu(dc, CC_OP_CMP, size); + insn_len += dec10_ind_alu(env, dc, CC_OP_CMP, size); break; case CRISV10_IND_TEST: LOG_DIS("test size=%d op=%d %d\n", size, dc->src, dc->dst); @@ -1047,7 +1050,7 @@ static unsigned int dec10_ind(DisasContext *dc) cris_evaluate_flags(dc); cris_cc_mask(dc, CC_MASK_NZVC); cris_alu_m_alloc_temps(t); - insn_len += dec10_prep_move_m(dc, 0, size, t[0]); + insn_len += dec10_prep_move_m(env, dc, 0, size, t[0]); tcg_gen_andi_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], ~3); cris_alu(dc, CC_OP_CMP, cpu_R[dc->dst], t[0], tcg_const_tl(0), size); @@ -1056,39 +1059,39 @@ static unsigned int dec10_ind(DisasContext *dc) case CRISV10_IND_ADD: LOG_DIS("add size=%d op=%d %d\n", size, dc->src, dc->dst); cris_cc_mask(dc, CC_MASK_NZVC); - insn_len += dec10_ind_alu(dc, CC_OP_ADD, size); + insn_len += dec10_ind_alu(env, dc, CC_OP_ADD, size); break; case CRISV10_IND_SUB: LOG_DIS("sub size=%d op=%d %d\n", size, dc->src, dc->dst); cris_cc_mask(dc, CC_MASK_NZVC); - insn_len += dec10_ind_alu(dc, CC_OP_SUB, size); + insn_len += dec10_ind_alu(env, dc, CC_OP_SUB, size); break; case CRISV10_IND_BOUND: LOG_DIS("bound size=%d op=%d %d\n", size, dc->src, dc->dst); cris_cc_mask(dc, CC_MASK_NZVC); - insn_len += dec10_ind_bound(dc, size); + insn_len += dec10_ind_bound(env, dc, size); break; case CRISV10_IND_AND: LOG_DIS("and size=%d op=%d %d\n", size, dc->src, dc->dst); cris_cc_mask(dc, CC_MASK_NZVC); - insn_len += dec10_ind_alu(dc, CC_OP_AND, size); + insn_len += dec10_ind_alu(env, dc, CC_OP_AND, size); break; case CRISV10_IND_OR: LOG_DIS("or size=%d op=%d %d\n", size, dc->src, dc->dst); cris_cc_mask(dc, CC_MASK_NZVC); - insn_len += dec10_ind_alu(dc, CC_OP_OR, size); + insn_len += dec10_ind_alu(env, dc, CC_OP_OR, size); break; case CRISV10_IND_MOVX: - insn_len = dec10_alux_m(dc, CC_OP_MOVE); + insn_len = dec10_alux_m(env, dc, CC_OP_MOVE); break; case CRISV10_IND_ADDX: - insn_len = dec10_alux_m(dc, CC_OP_ADD); + insn_len = dec10_alux_m(env, dc, CC_OP_ADD); break; case CRISV10_IND_SUBX: - insn_len = dec10_alux_m(dc, CC_OP_SUB); + insn_len = dec10_alux_m(env, dc, CC_OP_SUB); break; case CRISV10_IND_CMPX: - insn_len = dec10_alux_m(dc, CC_OP_CMP); + insn_len = dec10_alux_m(env, dc, CC_OP_CMP); break; case CRISV10_IND_MUL: /* This is a reg insn coded in the mem indir space. */ @@ -1097,7 +1100,7 @@ static unsigned int dec10_ind(DisasContext *dc) dec10_reg_mul(dc, size, dc->ir & (1 << 10)); break; case CRISV10_IND_BDAP_M: - insn_len = dec10_bdap_m(dc, size); + insn_len = dec10_bdap_m(env, dc, size); break; default: LOG_DIS("pc=%x var-ind.%d %d r%d r%d\n", @@ -1110,7 +1113,7 @@ static unsigned int dec10_ind(DisasContext *dc) switch (dc->opcode) { case CRISV10_IND_MOVE_M_SPR: - insn_len = dec10_ind_move_m_pr(dc); + insn_len = dec10_ind_move_m_pr(env, dc); break; case CRISV10_IND_MOVE_SPR_M: insn_len = dec10_ind_move_pr_m(dc); @@ -1119,7 +1122,7 @@ static unsigned int dec10_ind(DisasContext *dc) if (dc->src == 15) { LOG_DIS("jump.%d %d r%d r%d direct\n", size, dc->opcode, dc->src, dc->dst); - imm = ldl_code(dc->pc + 2); + imm = cpu_ldl_code(env, dc->pc + 2); if (dc->mode == CRISV10_MODE_AUTOINC) insn_len += size; @@ -1168,24 +1171,24 @@ static unsigned int dec10_ind(DisasContext *dc) dc->delayed_branch--; /* v10 has no dslot here. */ break; case CRISV10_IND_MOVX: - insn_len = dec10_alux_m(dc, CC_OP_MOVE); + insn_len = dec10_alux_m(env, dc, CC_OP_MOVE); break; case CRISV10_IND_ADDX: - insn_len = dec10_alux_m(dc, CC_OP_ADD); + insn_len = dec10_alux_m(env, dc, CC_OP_ADD); break; case CRISV10_IND_SUBX: - insn_len = dec10_alux_m(dc, CC_OP_SUB); + insn_len = dec10_alux_m(env, dc, CC_OP_SUB); break; case CRISV10_IND_CMPX: - insn_len = dec10_alux_m(dc, CC_OP_CMP); + insn_len = dec10_alux_m(env, dc, CC_OP_CMP); break; case CRISV10_IND_DIP: - insn_len = dec10_dip(dc); + insn_len = dec10_dip(env, dc); break; case CRISV10_IND_BCC_M: cris_cc_mask(dc, 0); - imm = ldsw_code(dc->pc + 2); + imm = cpu_ldsw_code(env, dc->pc + 2); simm = (int16_t)imm; simm += 4; @@ -1202,7 +1205,7 @@ static unsigned int dec10_ind(DisasContext *dc) return insn_len; } -static unsigned int crisv10_decoder(DisasContext *dc) +static unsigned int crisv10_decoder(CPUCRISState *env, DisasContext *dc) { unsigned int insn_len = 2; @@ -1210,7 +1213,7 @@ static unsigned int crisv10_decoder(DisasContext *dc) tcg_gen_debug_insn_start(dc->pc); /* Load a halfword onto the instruction register. */ - dc->ir = lduw_code(dc->pc); + dc->ir = cpu_lduw_code(env, dc->pc); /* Now decode it. */ dc->opcode = EXTRACT_FIELD(dc->ir, 6, 9); @@ -1235,7 +1238,7 @@ static unsigned int crisv10_decoder(DisasContext *dc) break; case CRISV10_MODE_AUTOINC: case CRISV10_MODE_INDIRECT: - insn_len = dec10_ind(dc); + insn_len = dec10_ind(env, dc); break; } -- 1.7.10.4