From patchwork Thu Apr 5 05:51:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 150872 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8B485B7047 for ; Thu, 5 Apr 2012 16:12:32 +1000 (EST) Received: from localhost ([::1]:54754 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFfc5-0008U0-S8 for incoming@patchwork.ozlabs.org; Thu, 05 Apr 2012 01:52:05 -0400 Received: from eggs.gnu.org ([208.118.235.92]:44508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFfbh-0007lU-UZ for qemu-devel@nongnu.org; Thu, 05 Apr 2012 01:51:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SFfbY-00029f-OU for qemu-devel@nongnu.org; Thu, 05 Apr 2012 01:51:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:2368) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFfbY-00029P-GW for qemu-devel@nongnu.org; Thu, 05 Apr 2012 01:51:32 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q355pEUh026968 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 5 Apr 2012 01:51:14 -0400 Received: from bling.home (ovpn-113-138.phx2.redhat.com [10.3.113.138]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id q355pDnr025041; Thu, 5 Apr 2012 01:51:13 -0400 From: Alex Williamson To: qemu-devel@nongnu.org, mst@redhat.com Date: Wed, 04 Apr 2012 23:51:13 -0600 Message-ID: <20120405055113.31461.45258.stgit@bling.home> In-Reply-To: <20120405050848.31461.10826.stgit@bling.home> References: <20120405050848.31461.10826.stgit@bling.home> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: aliguori@us.ibm.com, gleb@redhat.com, jbaron@redhat.com, yamahata@valinux.co.jp, alex.williamson@redhat.com, kraxel@redhat.com, pbonzini@redhat.com, imammedo@redhat.com, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 2/5] acpi_piix4: Only allow writes to PCI hotplug eject register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is never read. We can also derive bus from the write handler, making this more inline with the other callbacks. Note that pciej_write was actually called with (PCIBus *)dev->bus, which is cast as a void* allowing us to pretend it's a BusState*. Fix this so we don't depend on the BusState location within PCIBus. Signed-off-by: Alex Williamson --- docs/specs/acpi_pci_hotplug.txt | 2 +- hw/acpi_piix4.c | 14 ++++---------- 2 files changed, 5 insertions(+), 11 deletions(-) diff --git a/docs/specs/acpi_pci_hotplug.txt b/docs/specs/acpi_pci_hotplug.txt index 1e2c8a2..1e61d19 100644 --- a/docs/specs/acpi_pci_hotplug.txt +++ b/docs/specs/acpi_pci_hotplug.txt @@ -28,7 +28,7 @@ PCI device eject (IO port 0xae08-0xae0b, 4-byte access): ---------------------------------------- Used by ACPI BIOS _EJ0 method to request device removal. One bit per slot. -Reads return 0. +Read-only. PCI removability status (IO port 0xae0c-0xae0f, 4-byte access): ----------------------------------------------- diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 44d1423..6ee832a 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -487,15 +487,11 @@ static uint32_t pci_down_read(void *opaque, uint32_t addr) return val; } -static uint32_t pciej_read(void *opaque, uint32_t addr) -{ - PIIX4_DPRINTF("pciej read %x\n", addr); - return 0; -} - static void pciej_write(void *opaque, uint32_t addr, uint32_t val) { - BusState *bus = opaque; + PIIX4PMState *s = opaque; + PCIDevice *dev = &s->dev; + BusState *bus = qdev_get_parent_bus(&dev->qdev); DeviceState *qdev, *next; int slot = ffs(val) - 1; @@ -507,7 +503,6 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val) } } - PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val); } @@ -547,8 +542,7 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s); register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s); - register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus); - register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, bus); + register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, s); register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s); register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s);