From patchwork Mon Jun 14 08:29:28 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gleb Natapov X-Patchwork-Id: 55489 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 716F51007D1 for ; Mon, 14 Jun 2010 18:32:01 +1000 (EST) Received: from localhost ([127.0.0.1]:56329 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OO55E-0001lP-6B for incoming@patchwork.ozlabs.org; Mon, 14 Jun 2010 04:31:52 -0400 Received: from [140.186.70.92] (port=44185 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OO52z-00016Q-Se for qemu-devel@nongnu.org; Mon, 14 Jun 2010 04:29:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OO52y-00042e-LZ for qemu-devel@nongnu.org; Mon, 14 Jun 2010 04:29:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:20759) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OO52y-00042T-Bu for qemu-devel@nongnu.org; Mon, 14 Jun 2010 04:29:32 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o5E8TU8I003677 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 14 Jun 2010 04:29:31 -0400 Received: from dhcp-1-237.tlv.redhat.com (dhcp-1-237.tlv.redhat.com [10.35.1.237]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o5E8TTap022045 for ; Mon, 14 Jun 2010 04:29:30 -0400 Received: by dhcp-1-237.tlv.redhat.com (Postfix, from userid 13519) id D580218D472; Mon, 14 Jun 2010 11:29:28 +0300 (IDT) Date: Mon, 14 Jun 2010 11:29:28 +0300 From: Gleb Natapov To: qemu-devel@nongnu.org Message-ID: <20100614082928.GB21797@redhat.com> MIME-Version: 1.0 Content-Disposition: inline X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. Subject: [Qemu-devel] [PATCHv2] pass info about hpets to seabios.] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Currently HPET ACPI table is created regardless of whether qemu actually created hpet device. This may confuse some guests that don't check that hpet is functional before using it. Solve this by passing info about hpets in qemu to seabios via fw config interface. Additional benefit is that seabios no longer uses hard coded hpet configuration. Proposed interface supports up to 8 hpets. This is the number defined by hpet spec. Signed-off-by: Gleb Natapov --- Gleb. diff --git a/hw/hpet.c b/hw/hpet.c index 93fc399..704fed1 100644 --- a/hw/hpet.c +++ b/hw/hpet.c @@ -71,8 +71,11 @@ typedef struct HPETState { uint64_t config; /* configuration */ uint64_t isr; /* interrupt status reg */ uint64_t hpet_counter; /* main counter */ + uint8_t hpet_id; /* instance id */ } HPETState; +struct hpet_fw_config hpet_cfg = {.count = ~0}; + static uint32_t hpet_in_legacy_mode(HPETState *s) { return s->config & HPET_CFG_LEGACY; @@ -228,6 +231,7 @@ static int hpet_post_load(void *opaque, int version_id) /* Push number of timers into capability returned via HPET_ID */ s->capability &= ~HPET_ID_NUM_TIM_MASK; s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT; + hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability; /* Derive HPET_MSI_SUPPORT from the capability of the first timer. */ s->flags &= ~(1 << HPET_MSI_SUPPORT); @@ -661,6 +665,8 @@ static void hpet_reset(DeviceState *d) */ hpet_pit_enable(); } + hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability; + hpet_cfg.hpet[s->hpet_id].address = sysbus_from_qdev(d)->mmio[0].addr; count = 1; } @@ -680,6 +686,16 @@ static int hpet_init(SysBusDevice *dev) int i, iomemtype; HPETTimer *timer; + if (hpet_cfg.count == ~0) /* first instance */ + hpet_cfg.count = 0; + + if (hpet_cfg.count == 8) { + fprintf(stderr, "Only 8 instances of HPET is allowed\n"); + return -1; + } + + s->hpet_id = hpet_cfg.count++; + for (i = 0; i < HPET_NUM_IRQ_ROUTES; i++) { sysbus_init_irq(dev, &s->irqs[i]); } diff --git a/hw/hpet_emul.h b/hw/hpet_emul.h index d7bc102..8bf312a 100644 --- a/hw/hpet_emul.h +++ b/hw/hpet_emul.h @@ -53,4 +53,19 @@ #define HPET_TN_INT_ROUTE_CAP_SHIFT 32 #define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U +struct hpet_fw_entry +{ + uint32_t event_timer_block_id; + uint64_t address; + uint16_t min_tick; + uint8_t page_prot; +} __attribute__ ((packed)); + +struct hpet_fw_config +{ + uint8_t count; + struct hpet_fw_entry hpet[8]; +} __attribute__ ((packed)); + +extern struct hpet_fw_config hpet_cfg; #endif diff --git a/hw/pc.c b/hw/pc.c index 1491129..d14d657 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -61,6 +61,7 @@ #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) +#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4) #define E820_NR_ENTRIES 16 @@ -484,6 +485,8 @@ static void *bochs_bios_init(void) fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table, sizeof(struct e820_table)); + fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, (uint8_t *)&hpet_cfg, + sizeof(struct hpet_fw_config)); /* allocate memory for the NUMA channel: one (64bit) word for the number * of nodes, one word for each VCPU->node and one word for each node to * hold the amount of memory.