From patchwork Sat Feb 20 19:32:23 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 47857 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 47933B7D78 for ; Wed, 17 Mar 2010 03:00:43 +1100 (EST) Received: from localhost ([127.0.0.1]:39567 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NrZ3D-0007I3-6V for incoming@patchwork.ozlabs.org; Tue, 16 Mar 2010 11:51:23 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NrYxF-0005b7-As for qemu-devel@nongnu.org; Tue, 16 Mar 2010 11:45:13 -0400 Received: from [199.232.76.173] (port=41189 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NrYxE-0005ah-M5 for qemu-devel@nongnu.org; Tue, 16 Mar 2010 11:45:12 -0400 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1NrYxC-00073E-5t for qemu-devel@nongnu.org; Tue, 16 Mar 2010 11:45:12 -0400 Received: from are.twiddle.net ([75.149.56.221]:41145) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NrYxB-00072l-KA for qemu-devel@nongnu.org; Tue, 16 Mar 2010 11:45:09 -0400 Received: by are.twiddle.net (Postfix, from userid 5000) id 3C48EAEB; Tue, 16 Mar 2010 08:45:06 -0700 (PDT) From: Richard Henderson Date: Sat, 20 Feb 2010 11:32:23 -0800 To: qemu-devel@nongnu.org Message-Id: <20100316154506.3C48EAEB@are.twiddle.net> X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH 2/4] tcg-hppa: Fix 64-bit argument ordering. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org --- tcg/tcg.c | 12 +++++++++++- 1 files changed, 11 insertions(+), 1 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 1818868..d753149 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -596,7 +596,17 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, real_args++; } #endif -#ifdef TCG_TARGET_WORDS_BIGENDIAN + /* If stack grows up, then we will be placing successive + arguments at lower addresses, which means we need to + reverse the order compared to how we would normally + treat either big or little-endian. For those arguments + that will wind up in registers, this still works for + HPPA (the only current STACK_GROWSUP target) since the + argument registers are *also* allocated in decreasing + order. If another such target is added, this logic may + have to get more complicated to differentiate between + stack arguments and register arguments. */ +#if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) *gen_opparam_ptr++ = args[i] + 1; *gen_opparam_ptr++ = args[i]; #else