From patchwork Mon Feb 22 10:38:25 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 45958 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DB795B7CA6 for ; Mon, 22 Feb 2010 21:53:19 +1100 (EST) Received: from localhost ([127.0.0.1]:56799 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NjVpT-0000id-5D for incoming@patchwork.ozlabs.org; Mon, 22 Feb 2010 05:47:55 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NjVjU-00087E-Lw for qemu-devel@nongnu.org; Mon, 22 Feb 2010 05:41:44 -0500 Received: from [199.232.76.173] (port=37368 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NjVjT-00086u-Qt for qemu-devel@nongnu.org; Mon, 22 Feb 2010 05:41:43 -0500 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1NjVjS-0006Iv-2O for qemu-devel@nongnu.org; Mon, 22 Feb 2010 05:41:43 -0500 Received: from mx1.redhat.com ([209.132.183.28]:50248) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NjVjR-0006In-Kf for qemu-devel@nongnu.org; Mon, 22 Feb 2010 05:41:41 -0500 Received: from int-mx03.intmail.prod.int.phx2.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.16]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o1MAfd68001455 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 22 Feb 2010 05:41:39 -0500 Received: from redhat.com (vpn1-7-16.ams2.redhat.com [10.36.7.16]) by int-mx03.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id o1MAfbRa012978; Mon, 22 Feb 2010 05:41:38 -0500 Date: Mon, 22 Feb 2010 12:38:25 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org, blauwirbel@gmail.com Message-ID: <20100222103823.GA20344@redhat.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.19 (2009-01-05) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.16 X-detected-operating-system: by monty-python.gnu.org: Genre and OS details not recognized. Cc: Subject: [Qemu-devel] [PATCH] apc_pci: simplify using rwhandler X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use rwhandler to simplify apb_pci. Signed-off-by: Michael S. Tsirkin --- Blue Swirl, please consider the following (compile-tested only) patch. hw/apb_pci.c | 74 ++++++++++----------------------------------------------- 1 files changed, 13 insertions(+), 61 deletions(-) diff --git a/hw/apb_pci.c b/hw/apb_pci.c index f14b432..324e74e 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -29,6 +29,7 @@ #include "sysbus.h" #include "pci.h" #include "pci_host.h" +#include "rwhandler.h" #include "apb_pci.h" /* debug APB */ @@ -65,6 +66,7 @@ do { printf("APB: " fmt , ## __VA_ARGS__); } while (0) typedef struct APBState { SysBusDevice busdev; PCIHostState host_state; + ReadWriteHandler pci_config_handler; uint32_t iommu[4]; uint32_t pci_control[16]; uint32_t pci_irq_map[8]; @@ -183,80 +185,28 @@ static CPUReadMemoryFunc * const apb_config_read[] = { &apb_config_readl, }; -static void apb_pci_config_write(APBState *s, target_phys_addr_t addr, +static void apb_pci_config_write(ReadWriteHandler *h, pcibus_t addr, uint32_t val, int size) { + APBState *s = container_of(h, APBState, pci_config_handler); + + val = qemu_bswap_len(val, size); APB_DPRINTF("%s: addr " TARGET_FMT_lx " val %x\n", __func__, addr, val); pci_data_write(s->host_state.bus, addr, val, size); } -static uint32_t apb_pci_config_read(APBState *s, target_phys_addr_t addr, +static uint32_t apb_pci_config_read(ReadWriteHandler *h, pcibus_t addr, int size) { uint32_t ret; + APBState *s = container_of(h, APBState, pci_config_handler); ret = pci_data_read(s->host_state.bus, addr, size); + ret = qemu_bswap_len(ret, size); APB_DPRINTF("%s: addr " TARGET_FMT_lx " -> %x\n", __func__, addr, ret); return ret; } -static void apb_pci_config_writel(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - APBState *s = opaque; - - apb_pci_config_write(s, addr, bswap32(val), 4); -} - -static void apb_pci_config_writew(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - APBState *s = opaque; - - apb_pci_config_write(s, addr, bswap16(val), 2); -} - -static void apb_pci_config_writeb(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - APBState *s = opaque; - - apb_pci_config_write(s, addr, val, 1); -} - -static uint32_t apb_pci_config_readl(void *opaque, target_phys_addr_t addr) -{ - APBState *s = opaque; - - return bswap32(apb_pci_config_read(s, addr, 4)); -} - -static uint32_t apb_pci_config_readw(void *opaque, target_phys_addr_t addr) -{ - APBState *s = opaque; - - return bswap16(apb_pci_config_read(s, addr, 2)); -} - -static uint32_t apb_pci_config_readb(void *opaque, target_phys_addr_t addr) -{ - APBState *s = opaque; - - return apb_pci_config_read(s, addr, 1); -} - -static CPUWriteMemoryFunc * const apb_pci_config_writes[] = { - &apb_pci_config_writeb, - &apb_pci_config_writew, - &apb_pci_config_writel, -}; - -static CPUReadMemoryFunc * const apb_pci_config_reads[] = { - &apb_pci_config_readb, - &apb_pci_config_readw, - &apb_pci_config_readl, -}; - static void pci_apb_iowriteb (void *opaque, target_phys_addr_t addr, uint32_t val) { @@ -453,8 +403,10 @@ static int pci_pbm_init_device(SysBusDevice *dev) pci_apb_iowrite, s); sysbus_init_mmio(dev, 0x10000ULL, pci_ioport); /* pci_config */ - pci_config = cpu_register_io_memory(apb_pci_config_reads, - apb_pci_config_writes, s); + s->pci_config_handler.read = apb_pci_config_read; + s->pci_config_handler.write = apb_pci_config_write; + pci_config = cpu_register_io_memory_simple(&s->pci_config_handler); + assert(pci_config >= 0); sysbus_init_mmio(dev, 0x1000000ULL, pci_config); /* mem_data */ pci_mem_data = pci_host_data_register_mmio(&s->host_state);