From patchwork Thu Dec 10 18:10:46 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 40856 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 394A5B7093 for ; Fri, 11 Dec 2009 05:25:54 +1100 (EST) Received: from localhost ([127.0.0.1]:44672 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NIni3-0001lx-4p for incoming@patchwork.ozlabs.org; Thu, 10 Dec 2009 13:25:51 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NInWC-0004fR-LL for qemu-devel@nongnu.org; Thu, 10 Dec 2009 13:13:36 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NInW8-0004aI-QR for qemu-devel@nongnu.org; Thu, 10 Dec 2009 13:13:36 -0500 Received: from [199.232.76.173] (port=41839 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NInW8-0004Zy-F3 for qemu-devel@nongnu.org; Thu, 10 Dec 2009 13:13:32 -0500 Received: from mx1.redhat.com ([209.132.183.28]:20232) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NInW8-0003fT-RO for qemu-devel@nongnu.org; Thu, 10 Dec 2009 13:13:33 -0500 Received: from int-mx03.intmail.prod.int.phx2.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.16]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id nBAIDTv3030316 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 10 Dec 2009 13:13:30 -0500 Received: from redhat.com (vpn-6-118.tlv.redhat.com [10.35.6.118]) by int-mx03.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id nBAIDSb9009325; Thu, 10 Dec 2009 13:13:28 -0500 Date: Thu, 10 Dec 2009 20:10:46 +0200 From: "Michael S. Tsirkin" To: Anthony Liguori , qemu-devel@nongnu.org Message-ID: <20091210181046.GG25707@redhat.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.19 (2009-01-05) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.16 X-detected-operating-system: by monty-python.gnu.org: Genre and OS details not recognized. Cc: Subject: [Qemu-devel] [PATCH 06/17] eepro100: symbolic names for pci registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org No functional changes. I verified that the generated binary does not change in meaningful ways. Survived light usage with linux guest. Signed-off-by: Michael S. Tsirkin --- hw/eepro100.c | 49 ++++++++++++++++++++++++++++++++----------------- 1 files changed, 32 insertions(+), 17 deletions(-) diff --git a/hw/eepro100.c b/hw/eepro100.c index 2a9e3b5..82e3766 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -412,19 +412,24 @@ static void pci_reset(EEPRO100State * s) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); /* PCI Device ID depends on device and is set below. */ /* PCI Command */ + /* TODO: this is the default, do not override. */ PCI_CONFIG_16(PCI_COMMAND, 0x0000); /* PCI Status */ - PCI_CONFIG_16(PCI_STATUS, 0x2800); + /* TODO: this seems to make no sense. */ + /* TODO: Value at RST# should be 0. */ + PCI_CONFIG_16(PCI_STATUS, + PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_SIG_TARGET_ABORT); /* PCI Revision ID */ PCI_CONFIG_8(PCI_REVISION_ID, 0x08); + /* TODO: this is the default, do not override. */ /* PCI Class Code */ - PCI_CONFIG_8(0x09, 0x00); + PCI_CONFIG_8(PCI_CLASS_PROG, 0x00); pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET); /* PCI Cache Line Size */ /* check cache line size!!! */ //~ PCI_CONFIG_8(0x0c, 0x00); /* PCI Latency Timer */ - PCI_CONFIG_8(0x0d, 0x20); // latency timer = 32 clocks + PCI_CONFIG_8(PCI_LATENCY_TIMER, 0x20); // latency timer = 32 clocks /* PCI Header Type */ /* BIST (built-in self test) */ #if defined(TARGET_I386) @@ -446,16 +451,20 @@ static void pci_reset(EEPRO100State * s) #endif #endif /* Expansion ROM Base Address (depends on boot disable!!!) */ - PCI_CONFIG_32(0x30, 0x00000000); + /* TODO: not needed, set when BAR is registered */ + PCI_CONFIG_32(PCI_ROM_ADDRESS, PCI_BASE_ADDRESS_SPACE_MEMORY); /* Capability Pointer */ - PCI_CONFIG_8(0x34, 0xdc); + /* TODO: revisions with power_management 1 use this but + * do not set new capability list bit in status register. */ + PCI_CONFIG_8(PCI_CAPABILITY_LIST, 0xdc); /* Interrupt Line */ /* Interrupt Pin */ - PCI_CONFIG_8(0x3d, 1); // interrupt pin 0 + /* TODO: RST# value should be 0 */ + PCI_CONFIG_8(PCI_INTERRUPT_PIN, 1); // interrupt pin 0 /* Minimum Grant */ - PCI_CONFIG_8(0x3e, 0x08); + PCI_CONFIG_8(PCI_MIN_GNT, 0x08); /* Maximum Latency */ - PCI_CONFIG_8(0x3f, 0x18); + PCI_CONFIG_8(PCI_MAX_LAT, 0x18); switch (device) { case i82550: @@ -479,52 +488,57 @@ static void pci_reset(EEPRO100State * s) case i82557A: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); PCI_CONFIG_8(PCI_REVISION_ID, 0x01); - PCI_CONFIG_8(0x34, 0x00); + PCI_CONFIG_8(PCI_CAPABILITY_LIST, 0x00); power_management = 0; break; case i82557B: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); PCI_CONFIG_8(PCI_REVISION_ID, 0x02); - PCI_CONFIG_8(0x34, 0x00); + PCI_CONFIG_8(PCI_CAPABILITY_LIST, 0x00); power_management = 0; break; case i82557C: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); PCI_CONFIG_8(PCI_REVISION_ID, 0x03); - PCI_CONFIG_8(0x34, 0x00); + PCI_CONFIG_8(PCI_CAPABILITY_LIST, 0x00); power_management = 0; break; case i82558A: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); - PCI_CONFIG_16(PCI_STATUS, 0x0290); + PCI_CONFIG_16(PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM | + PCI_STATUS_FAST_BACK | PCI_STATUS_CAP_LIST); PCI_CONFIG_8(PCI_REVISION_ID, 0x04); s->stats_size = 76; s->has_extended_tcb_support = 1; break; case i82558B: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); - PCI_CONFIG_16(PCI_STATUS, 0x0290); + PCI_CONFIG_16(PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM | + PCI_STATUS_FAST_BACK | PCI_STATUS_CAP_LIST); PCI_CONFIG_8(PCI_REVISION_ID, 0x05); s->stats_size = 76; s->has_extended_tcb_support = 1; break; case i82559A: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); - PCI_CONFIG_16(PCI_STATUS, 0x0290); + PCI_CONFIG_16(PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM | + PCI_STATUS_FAST_BACK | PCI_STATUS_CAP_LIST); PCI_CONFIG_8(PCI_REVISION_ID, 0x06); s->stats_size = 80; s->has_extended_tcb_support = 1; break; case i82559B: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); - PCI_CONFIG_16(PCI_STATUS, 0x0290); + PCI_CONFIG_16(PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM | + PCI_STATUS_FAST_BACK | PCI_STATUS_CAP_LIST); PCI_CONFIG_8(PCI_REVISION_ID, 0x07); s->stats_size = 80; s->has_extended_tcb_support = 1; break; case i82559C: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82557); - PCI_CONFIG_16(PCI_STATUS, 0x0290); + PCI_CONFIG_16(PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM | + PCI_STATUS_FAST_BACK | PCI_STATUS_CAP_LIST); PCI_CONFIG_8(PCI_REVISION_ID, 0x08); // TODO: Windows wants revision id 0x0c. PCI_CONFIG_8(PCI_REVISION_ID, 0x0c); @@ -537,7 +551,8 @@ static void pci_reset(EEPRO100State * s) break; case i82559ER: pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82551IT); - PCI_CONFIG_16(PCI_STATUS, 0x0290); + PCI_CONFIG_16(PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM | + PCI_STATUS_FAST_BACK | PCI_STATUS_CAP_LIST); PCI_CONFIG_8(PCI_REVISION_ID, 0x09); s->stats_size = 80; s->has_extended_tcb_support = 1;