From patchwork Thu Nov 26 10:38:20 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 39506 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 29031B6F1A for ; Thu, 26 Nov 2009 21:42:00 +1100 (EST) Received: from localhost ([127.0.0.1]:60563 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NDbnQ-0004dT-Sb for incoming@patchwork.ozlabs.org; Thu, 26 Nov 2009 05:41:56 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NDbmd-0004ab-65 for qemu-devel@nongnu.org; Thu, 26 Nov 2009 05:41:07 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NDbmY-0004Yh-Rp for qemu-devel@nongnu.org; Thu, 26 Nov 2009 05:41:06 -0500 Received: from [199.232.76.173] (port=35463 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NDbmY-0004Yb-Fp for qemu-devel@nongnu.org; Thu, 26 Nov 2009 05:41:02 -0500 Received: from mx1.redhat.com ([209.132.183.28]:8481) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NDbmX-0002vE-Km for qemu-devel@nongnu.org; Thu, 26 Nov 2009 05:41:02 -0500 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id nAQAexJ8026137 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 26 Nov 2009 05:40:59 -0500 Received: from redhat.com (vpn-6-30.tlv.redhat.com [10.35.6.30]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id nAQAeurx015618; Thu, 26 Nov 2009 05:40:57 -0500 Date: Thu, 26 Nov 2009 12:38:20 +0200 From: "Michael S. Tsirkin" To: Isaku Yamahata Message-ID: <20091126103820.GI26861@redhat.com> References: <20091125165834.GA24783@redhat.com> <20091126032146.GH25483%yamahata@valinux.co.jp> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20091126032146.GH25483%yamahata@valinux.co.jp> User-Agent: Mutt/1.5.19 (2009-01-05) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-detected-operating-system: by monty-python.gnu.org: Genre and OS details not recognized. Cc: qemu-devel@nongnu.org Subject: [Qemu-devel] Re: [PATCH 0/4] pci: interrupt status/interrupt disable support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Thu, Nov 26, 2009 at 12:21:46PM +0900, Isaku Yamahata wrote: > At least I think irq_disable can be removed The following patch on top of mine removes irq_disabled field in PCIDevice. I am of two minds whether this makes the code better. What is your opinion? diff --git a/hw/pci.c b/hw/pci.c index 3daae46..75f97df 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -128,15 +128,18 @@ static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change) bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0); } -/* Update irq disabled field after config space change, - * assert/deassert interrupts if necessary. */ -static void pci_update_irq_disabled(PCIDevice *d) +static inline int pci_irq_disabled(PCIDevice *d) { - int i; - int disabled = !!(pci_get_word(d->config + PCI_COMMAND) & - PCI_COMMAND_INTX_DISABLE); - if (disabled == d->irq_disabled) + return !!(pci_get_word(d->config + PCI_COMMAND) & PCI_COMMAND_INTX_DISABLE); +} + +/* Called after interrupt disabled field update in config space, + * assert/deassert interrupts if necessary. + * Gets original interrupt disable bit value (before update). */ +static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled) +{ + int i, disabled = pci_irq_disabled(d); + if (disabled == was_irq_disabled) return; - d->irq_disabled = disabled; for (i = 0; i < ARRAY_SIZE(d->irq_state); ++i) { int state = d->irq_state[i]; @@ -150,7 +153,6 @@ static void pci_device_reset(PCIDevice *dev) memset(dev->irq_state, 0, sizeof dev->irq_state); dev->irq_status = 0; - dev->irq_disabled = 0; pci_update_irq_status(dev); dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); @@ -369,14 +371,14 @@ void pci_device_save(PCIDevice *s, QEMUFile *f) int pci_device_load(PCIDevice *s, QEMUFile *f) { - int ret, i; + int ret, i, was_irq_disabled = pci_irq_disabled(d); ret = vmstate_load_state(f, pci_get_vmstate(s), s, s->version_id); for (i = 0; i < ARRAY_SIZE(s->irq_state); ++i) { s->irq_status += s->irq_state[i]; } /* Restore the interrupt status bit. */ pci_update_irq_status(s); - pci_update_irq_disabled(s); + pci_update_irq_disabled(s, was_irq_disabled); return ret; } @@ -924,7 +926,7 @@ uint32_t pci_default_read_config(PCIDevice *d, void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) { - int i; + int i, was_irq_disabled = pci_irq_disabled(d); uint32_t config_size = pci_config_size(d); for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) { @@ -938,7 +940,7 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) pci_update_mappings(d); if (range_covers_byte(addr, l, PCI_COMMAND)) - pci_update_irq_disabled(d); + pci_update_irq_disabled(d, was_irq_disabled); } /***********************************************************/ @@ -957,7 +959,7 @@ static void pci_set_irq(void *opaque, int irq_num, int level) pci_dev->irq_state[irq_num] = level; pci_dev->irq_status += change; pci_update_irq_status(pci_dev); - if (pci_dev->irq_disabled) + if (pci_irq_disabled(pci_dev)) return; pci_change_irq_level(pci_dev, irq_num, change); } diff --git a/hw/pci.h b/hw/pci.h index 994b8bc..25ad114 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -227,9 +227,6 @@ struct PCIDevice { /* Sum of all irq levels. Used to implement irq status register. */ int irq_status; - /* Whether interrupts are disabled by command bit. */ - int irq_disabled; - /* Capability bits */ uint32_t cap_present;