From patchwork Wed Oct 28 16:32:51 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?5q2m55SwID0/SVNPLTIwMjItSlA/Qj9JQnNrUWoxVFRHa2JLRUk9Pz0=?= X-Patchwork-Id: 37146 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C4F7E1007E0 for ; Thu, 29 Oct 2009 08:54:44 +1100 (EST) Received: from localhost ([127.0.0.1]:38636 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N3CKw-0005zl-RH for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2009 13:29:30 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N3Bn3-0007Vj-3v for qemu-devel@nongnu.org; Wed, 28 Oct 2009 12:54:29 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N3Bmw-0007M6-4t for qemu-devel@nongnu.org; Wed, 28 Oct 2009 12:54:26 -0400 Received: from [199.232.76.173] (port=45980 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N3Bmv-0007Lh-MC for qemu-devel@nongnu.org; Wed, 28 Oct 2009 12:54:21 -0400 Received: from smtp-vip.mem.interq.net ([210.157.1.50]:32546 helo=smtp01.mem.internal-gmo) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N3Bmt-0002l5-Em for qemu-devel@nongnu.org; Wed, 28 Oct 2009 12:54:20 -0400 Received: (from root@localhost) by smtp01.mem.internal-gmo (8.13.8/8.12.6) id n9SGs6eZ018669 for qemu-devel@nongnu.org; Thu, 29 Oct 2009 01:54:06 +0900 (JST) Received: from YOUR-BD18D6DD63.m1.interq.or.jp (ntymns039132.ymns.nt.ftth.ppp.infoweb.ne.jp [121.92.167.132]) by smtp01.mem.internal-gmo with ESMTP id n9SGs5ZP018647 for ; (me101664 for with PLAIN) Thu, 29 Oct 2009 01:54:06 +0900 (JST) Message-Id: <200910281632.AA00140@YOUR-BD18D6DD63.m1.interq.or.jp> From: "TAKEDA, toshiya" Date: Thu, 29 Oct 2009 01:32:51 +0900 To: qemu-devel MIME-Version: 1.0 X-Mailer: AL-Mail32 Version 1.13 X-detected-operating-system: by monty-python.gnu.org: Solaris 10 (beta) Subject: [Qemu-devel] [PATCH v3 3/25] i386: add private features for a20mask X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch is to add private_features to i386. It is like cpuid_ext*_features, but is used for any features not defined in CPUID. And "a20mask" feature is defined in private_features. It is for a20 adrdress mask of PC-98 family. --- a/qemu/target-i386/cpu.h +++ b/qemu/target-i386/cpu.h @@ -405,6 +405,8 @@ #define CPUID_EXT3_IBS (1 << 10) #define CPUID_EXT3_SKINIT (1 << 12) +#define PRIVATE_FEATURE_A20MASK (1 << 0) + #define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */ #define CPUID_VENDOR_INTEL_2 0x49656e69 /* "ineI" */ #define CPUID_VENDOR_INTEL_3 0x6c65746e /* "ntel" */ @@ -685,6 +687,9 @@ typedef struct CPUX86State { uint32_t cpuid_apic_id; int cpuid_vendor_override; + /* private features not defined in CPUID */ + uint32_t private_features; + /* MTRRs */ uint64_t mtrr_fixed[11]; uint64_t mtrr_deftype; diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c index c961544..3580740 100644 --- a/qemu/target-i386/helper.c +++ b/qemu/target-i386/helper.c @@ -57,11 +57,18 @@ static const char *ext3_feature_name[] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }; +static const char *private_feature_name[] = { + "a20mask", NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +}; static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features, uint32_t *ext_features, uint32_t *ext2_features, - uint32_t *ext3_features) + uint32_t *ext3_features, + uint32_t *private_features) { int i; int found = 0; @@ -86,6 +93,11 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features, *ext3_features |= 1 << i; found = 1; } + for ( i = 0 ; i < 32 ; i++ ) + if (private_feature_name[i] && !strcmp (flagname, private_feature_name[i])) { + *private_features |= 1 << i; + found = 1; + } if (!found) { fprintf(stderr, "CPU feature %s not found\n", flagname); } @@ -99,6 +111,7 @@ typedef struct x86_def_t { int model; int stepping; uint32_t features, ext_features, ext2_features, ext3_features; + uint32_t private_features; uint32_t xlevel; char model_id[48]; int vendor_override; @@ -375,6 +388,7 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) char *featurestr, *name = strtok(s, ","); uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0; uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0; + uint32_t plus_private_features = 0, minus_private_features = 0; uint32_t numvalue; def = NULL; @@ -393,16 +407,21 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) } add_flagname_to_bitmaps("hypervisor", &plus_features, - &plus_ext_features, &plus_ext2_features, &plus_ext3_features); + &plus_ext_features, &plus_ext2_features, &plus_ext3_features, + &plus_private_features); featurestr = strtok(NULL, ","); while (featurestr) { char *val; if (featurestr[0] == '+') { - add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features); + add_flagname_to_bitmaps(featurestr + 1, &plus_features, + &plus_ext_features, &plus_ext2_features, &plus_ext3_features, + &plus_private_features); } else if (featurestr[0] == '-') { - add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features); + add_flagname_to_bitmaps(featurestr + 1, &minus_features, + &minus_ext_features, &minus_ext2_features, &minus_ext3_features, + &minus_private_features); } else if ((val = strchr(featurestr, '='))) { *val = 0; val++; if (!strcmp(featurestr, "family")) { @@ -479,10 +498,12 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) x86_cpu_def->ext_features |= plus_ext_features; x86_cpu_def->ext2_features |= plus_ext2_features; x86_cpu_def->ext3_features |= plus_ext3_features; + x86_cpu_def->private_features |= plus_private_features; x86_cpu_def->features &= ~minus_features; x86_cpu_def->ext_features &= ~minus_ext_features; x86_cpu_def->ext2_features &= ~minus_ext2_features; x86_cpu_def->ext3_features &= ~minus_ext3_features; + x86_cpu_def->private_features &= ~minus_private_features; free(s); return 0; @@ -528,6 +549,7 @@ static int cpu_x86_register (CPUX86State *env, const char *cpu_model) env->cpuid_ext2_features = def->ext2_features; env->cpuid_xlevel = def->xlevel; env->cpuid_ext3_features = def->ext3_features; + env->private_features = def->private_features; { const char *model_id = def->model_id; int c, len, i; @@ -569,7 +591,11 @@ void cpu_reset(CPUX86State *env) env->hflags2 |= HF2_GIF_MASK; cpu_x86_update_cr0(env, 0x60000010); - env->a20_mask = ~0x0; + if (env->private_features & PRIVATE_FEATURE_A20MASK) { + env->a20_mask = 0xfffff; + } else { + env->a20_mask = ~0x0; + } env->smbase = 0x30000; env->idt.limit = 0xffff; @@ -938,7 +964,15 @@ void cpu_x86_set_a20(CPUX86State *env, int a20_state) /* when a20 is changed, all the MMU mappings are invalid, so we must flush everything */ tlb_flush(env, 1); - env->a20_mask = ~(1 << 20) | (a20_state << 20); + if (env->private_features & PRIVATE_FEATURE_A20MASK) { + if (a20_state) { + env->a20_mask = ~0x0; + } else { + env->a20_mask = 0xfffff; + } + } else { + env->a20_mask = ~(1 << 20) | (a20_state << 20); + } } }