From patchwork Mon Dec 23 09:04:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chenfan X-Patchwork-Id: 304724 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 6856B2C00B9 for ; Mon, 23 Dec 2013 20:06:53 +1100 (EST) Received: from localhost ([::1]:60848 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vv1TO-0000XP-Ec for incoming@patchwork.ozlabs.org; Mon, 23 Dec 2013 04:06:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55543) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vv1So-0000Ow-1U for qemu-devel@nongnu.org; Mon, 23 Dec 2013 04:06:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vv1Sj-0008Dl-6l for qemu-devel@nongnu.org; Mon, 23 Dec 2013 04:06:13 -0500 Received: from [222.73.24.84] (port=17879 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vv1Si-0008CZ-29 for qemu-devel@nongnu.org; Mon, 23 Dec 2013 04:06:09 -0500 X-IronPort-AV: E=Sophos;i="4.95,535,1384272000"; d="scan'208";a="9310469" Received: from unknown (HELO tang.cn.fujitsu.com) ([10.167.250.3]) by song.cn.fujitsu.com with ESMTP; 23 Dec 2013 17:02:24 +0800 Received: from fnstmail02.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id rBN95uAr001202; Mon, 23 Dec 2013 17:05:56 +0800 Received: from G08FNSTD131468.fnst.cn.fujitsu.com ([10.167.226.78]) by fnstmail02.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.3) with ESMTP id 2013122317051970-656226 ; Mon, 23 Dec 2013 17:05:19 +0800 From: Chen Fan To: qemu-devel@nongnu.org Date: Mon, 23 Dec 2013 17:04:02 +0800 Message-Id: <18be99663ab938112a7ce805d33f069d411f4c0a.1387787208.git.chen.fan.fnst@cn.fujitsu.com> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: References: X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/12/23 17:05:19, Serialize by Router on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/12/23 17:05:20, Serialize complete at 2013/12/23 17:05:20 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 222.73.24.84 Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [RFC qom-next v5 1/8] x86: move apic_state field from CPUX86State to X86CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This motion is preparing for refactoring vCPU apic subsequently. Signed-off-by: Chen Fan --- cpu-exec.c | 2 +- cpus.c | 5 ++--- hw/i386/kvmvapic.c | 8 +++----- hw/i386/pc.c | 17 ++++++++--------- target-i386/cpu-qom.h | 4 ++++ target-i386/cpu.c | 22 ++++++++++------------ target-i386/cpu.h | 4 ---- target-i386/helper.c | 9 ++++----- target-i386/kvm.c | 23 ++++++++++------------- target-i386/misc_helper.c | 8 ++++---- 10 files changed, 46 insertions(+), 56 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 30cfa2a..2711c58 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -320,7 +320,7 @@ int cpu_exec(CPUArchState *env) #if !defined(CONFIG_USER_ONLY) if (interrupt_request & CPU_INTERRUPT_POLL) { cpu->interrupt_request &= ~CPU_INTERRUPT_POLL; - apic_poll_irq(env->apic_state); + apic_poll_irq(x86_env_get_cpu(env)->apic_state); } #endif if (interrupt_request & CPU_INTERRUPT_INIT) { diff --git a/cpus.c b/cpus.c index 01d128d..ca4c59f 100644 --- a/cpus.c +++ b/cpus.c @@ -1458,12 +1458,11 @@ void qmp_inject_nmi(Error **errp) CPU_FOREACH(cs) { X86CPU *cpu = X86_CPU(cs); - CPUX86State *env = &cpu->env; - if (!env->apic_state) { + if (!cpu->apic_state) { cpu_interrupt(cs, CPU_INTERRUPT_NMI); } else { - apic_deliver_nmi(env->apic_state); + apic_deliver_nmi(cpu->apic_state); } } #elif defined(TARGET_S390X) diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 44ee62a..72025d0 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -366,7 +366,7 @@ static int vapic_enable(VAPICROMState *s, X86CPU *cpu) (((hwaddr)cpu_number) << VAPIC_CPU_SHIFT); cpu_physical_memory_rw(vapic_paddr + offsetof(VAPICState, enabled), (void *)&enabled, sizeof(enabled), 1); - apic_enable_vapic(cpu->env.apic_state, vapic_paddr); + apic_enable_vapic(cpu->apic_state, vapic_paddr); s->state = VAPIC_ACTIVE; @@ -496,12 +496,10 @@ static void vapic_enable_tpr_reporting(bool enable) }; CPUState *cs; X86CPU *cpu; - CPUX86State *env; CPU_FOREACH(cs) { cpu = X86_CPU(cs); - env = &cpu->env; - info.apic = env->apic_state; + info.apic = cpu->apic_state; run_on_cpu(cs, vapic_do_enable_tpr_reporting, &info); } } @@ -700,7 +698,7 @@ static void vapic_write(void *opaque, hwaddr addr, uint64_t data, default: case 4: if (!kvm_irqchip_in_kernel()) { - apic_poll_irq(env->apic_state); + apic_poll_irq(cpu->apic_state); } break; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e9831ca..d000995 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -172,13 +172,14 @@ void cpu_smm_update(CPUX86State *env) int cpu_get_pic_interrupt(CPUX86State *env) { int intno; + X86CPU *cpu = x86_env_get_cpu(env); - intno = apic_get_interrupt(env->apic_state); + intno = apic_get_interrupt(cpu->apic_state); if (intno >= 0) { return intno; } /* read the irq from the PIC */ - if (!apic_accept_pic_intr(env->apic_state)) { + if (!apic_accept_pic_intr(cpu->apic_state)) { return -1; } @@ -190,15 +191,13 @@ static void pic_irq_request(void *opaque, int irq, int level) { CPUState *cs = first_cpu; X86CPU *cpu = X86_CPU(cs); - CPUX86State *env = &cpu->env; DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq); - if (env->apic_state) { + if (cpu->apic_state) { CPU_FOREACH(cs) { cpu = X86_CPU(cs); - env = &cpu->env; - if (apic_accept_pic_intr(env->apic_state)) { - apic_deliver_pic_intr(env->apic_state, level); + if (apic_accept_pic_intr(cpu->apic_state)) { + apic_deliver_pic_intr(cpu->apic_state, level); } } } else { @@ -913,7 +912,7 @@ DeviceState *cpu_get_current_apic(void) { if (current_cpu) { X86CPU *cpu = X86_CPU(current_cpu); - return cpu->env.apic_state; + return cpu->apic_state; } else { return NULL; } @@ -1007,7 +1006,7 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) } /* map APIC MMIO area if CPU has APIC */ - if (cpu && cpu->env.apic_state) { + if (cpu && cpu->apic_state) { /* XXX: what if the base changes? */ sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0, APIC_DEFAULT_ADDRESS, 0x1000); diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index f4fab15..775c82d 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -66,6 +66,10 @@ typedef struct X86CPU { CPUX86State env; + /* in order to simplify APIC support, we leave this pointer to the + user */ + struct DeviceState *apic_state; + bool hyperv_vapic; bool hyperv_relaxed_timing; int hyperv_spinlock_attempts; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index bb98f6d..e20b0c8 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2449,7 +2449,7 @@ static void x86_cpu_reset(CPUState *s) #if !defined(CONFIG_USER_ONLY) /* We hard-wire the BSP to the first CPU. */ if (s->cpu_index == 0) { - apic_designate_bsp(env->apic_state); + apic_designate_bsp(cpu->apic_state); } s->halted = !cpu_is_bsp(cpu); @@ -2459,7 +2459,7 @@ static void x86_cpu_reset(CPUState *s) #ifndef CONFIG_USER_ONLY bool cpu_is_bsp(X86CPU *cpu) { - return cpu_get_apic_base(cpu->env.apic_state) & MSR_IA32_APICBASE_BSP; + return cpu_get_apic_base(cpu->apic_state) & MSR_IA32_APICBASE_BSP; } /* TODO: remove me, when reset over QOM tree is implemented */ @@ -2500,31 +2500,29 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp) apic_type = "xen-apic"; } - env->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type); - if (env->apic_state == NULL) { + cpu->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type); + if (cpu->apic_state == NULL) { error_setg(errp, "APIC device '%s' could not be created", apic_type); return; } object_property_add_child(OBJECT(cpu), "apic", - OBJECT(env->apic_state), NULL); - qdev_prop_set_uint8(env->apic_state, "id", env->cpuid_apic_id); + OBJECT(cpu->apic_state), NULL); + qdev_prop_set_uint8(cpu->apic_state, "id", env->cpuid_apic_id); /* TODO: convert to link<> */ - apic = APIC_COMMON(env->apic_state); + apic = APIC_COMMON(cpu->apic_state); apic->cpu = cpu; } static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) { - CPUX86State *env = &cpu->env; - - if (env->apic_state == NULL) { + if (cpu->apic_state == NULL) { return; } - if (qdev_init(env->apic_state)) { + if (qdev_init(cpu->apic_state)) { error_setg(errp, "APIC device '%s' could not be initialized", - object_get_typename(OBJECT(env->apic_state))); + object_get_typename(OBJECT(cpu->apic_state))); return; } } diff --git a/target-i386/cpu.h b/target-i386/cpu.h index ea373e8..1d94a9d 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -895,10 +895,6 @@ typedef struct CPUX86State { int tsc_khz; void *kvm_xsave_buf; - /* in order to simplify APIC support, we leave this pointer to the - user */ - struct DeviceState *apic_state; - uint64_t mcg_cap; uint64_t mcg_ctl; uint64_t mce_banks[MCE_BANKS_DEF*4]; diff --git a/target-i386/helper.c b/target-i386/helper.c index 7c196ff..f2e76ad 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1248,7 +1248,8 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access) } else { cpu_restore_state(env, env->mem_io_pc); - apic_handle_tpr_access_report(env->apic_state, env->eip, access); + apic_handle_tpr_access_report(x86_env_get_cpu(env)->apic_state, + env->eip, access); } } #endif /* !CONFIG_USER_ONLY */ @@ -1295,14 +1296,12 @@ void do_cpu_init(X86CPU *cpu) cpu_reset(cs); cs->interrupt_request = sipi; env->pat = pat; - apic_init_reset(env->apic_state); + apic_init_reset(cpu->apic_state); } void do_cpu_sipi(X86CPU *cpu) { - CPUX86State *env = &cpu->env; - - apic_sipi(env->apic_state); + apic_sipi(cpu->apic_state); } #else void do_cpu_init(X86CPU *cpu) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 1188482..7522e98 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -1069,8 +1069,8 @@ static int kvm_put_sregs(X86CPU *cpu) sregs.cr3 = env->cr[3]; sregs.cr4 = env->cr[4]; - sregs.cr8 = cpu_get_apic_tpr(env->apic_state); - sregs.apic_base = cpu_get_apic_base(env->apic_state); + sregs.cr8 = cpu_get_apic_tpr(cpu->apic_state); + sregs.apic_base = cpu_get_apic_base(cpu->apic_state); sregs.efer = env->efer; @@ -1619,8 +1619,7 @@ static int kvm_get_mp_state(X86CPU *cpu) static int kvm_get_apic(X86CPU *cpu) { - CPUX86State *env = &cpu->env; - DeviceState *apic = env->apic_state; + DeviceState *apic = cpu->apic_state; struct kvm_lapic_state kapic; int ret; @@ -1637,8 +1636,7 @@ static int kvm_get_apic(X86CPU *cpu) static int kvm_put_apic(X86CPU *cpu) { - CPUX86State *env = &cpu->env; - DeviceState *apic = env->apic_state; + DeviceState *apic = cpu->apic_state; struct kvm_lapic_state kapic; if (apic && kvm_irqchip_in_kernel()) { @@ -1962,7 +1960,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) } DPRINTF("setting tpr\n"); - run->cr8 = cpu_get_apic_tpr(env->apic_state); + run->cr8 = cpu_get_apic_tpr(x86_cpu->apic_state); } } @@ -1976,8 +1974,8 @@ void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run) } else { env->eflags &= ~IF_MASK; } - cpu_set_apic_tpr(env->apic_state, run->cr8); - cpu_set_apic_base(env->apic_state, run->apic_base); + cpu_set_apic_tpr(x86_cpu->apic_state, run->cr8); + cpu_set_apic_base(x86_cpu->apic_state, run->apic_base); } int kvm_arch_process_async_events(CPUState *cs) @@ -2014,7 +2012,7 @@ int kvm_arch_process_async_events(CPUState *cs) if (cs->interrupt_request & CPU_INTERRUPT_POLL) { cs->interrupt_request &= ~CPU_INTERRUPT_POLL; - apic_poll_irq(env->apic_state); + apic_poll_irq(cpu->apic_state); } if (((cs->interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || @@ -2032,7 +2030,7 @@ int kvm_arch_process_async_events(CPUState *cs) if (cs->interrupt_request & CPU_INTERRUPT_TPR) { cs->interrupt_request &= ~CPU_INTERRUPT_TPR; kvm_cpu_synchronize_state(cs); - apic_handle_tpr_access_report(env->apic_state, env->eip, + apic_handle_tpr_access_report(cpu->apic_state, env->eip, env->tpr_access_type); } @@ -2056,11 +2054,10 @@ static int kvm_handle_halt(X86CPU *cpu) static int kvm_handle_tpr_access(X86CPU *cpu) { - CPUX86State *env = &cpu->env; CPUState *cs = CPU(cpu); struct kvm_run *run = cs->kvm_run; - apic_handle_tpr_access_report(env->apic_state, run->tpr_access.rip, + apic_handle_tpr_access_report(cpu->apic_state, run->tpr_access.rip, run->tpr_access.is_write ? TPR_ACCESS_WRITE : TPR_ACCESS_READ); return 1; diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index b6307ca..47f6a2f 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -155,7 +155,7 @@ target_ulong helper_read_crN(CPUX86State *env, int reg) break; case 8: if (!(env->hflags2 & HF2_VINTR_MASK)) { - val = cpu_get_apic_tpr(env->apic_state); + val = cpu_get_apic_tpr(x86_env_get_cpu(env)->apic_state); } else { val = env->v_tpr; } @@ -179,7 +179,7 @@ void helper_write_crN(CPUX86State *env, int reg, target_ulong t0) break; case 8: if (!(env->hflags2 & HF2_VINTR_MASK)) { - cpu_set_apic_tpr(env->apic_state, t0); + cpu_set_apic_tpr(x86_env_get_cpu(env)->apic_state, t0); } env->v_tpr = t0 & 0x0f; break; @@ -286,7 +286,7 @@ void helper_wrmsr(CPUX86State *env) env->sysenter_eip = val; break; case MSR_IA32_APICBASE: - cpu_set_apic_base(env->apic_state, val); + cpu_set_apic_base(x86_env_get_cpu(env)->apic_state, val); break; case MSR_EFER: { @@ -437,7 +437,7 @@ void helper_rdmsr(CPUX86State *env) val = env->sysenter_eip; break; case MSR_IA32_APICBASE: - val = cpu_get_apic_base(env->apic_state); + val = cpu_get_apic_base(x86_env_get_cpu(env)->apic_state); break; case MSR_EFER: val = env->efer;