From patchwork Mon Nov 14 12:06:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ~axelheider X-Patchwork-Id: 1710614 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NMltB2FfDz23nv for ; Thu, 1 Dec 2022 04:04:18 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p0QS0-00049g-Hh; Wed, 30 Nov 2022 12:00:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p0QRv-00045N-QC; Wed, 30 Nov 2022 12:00:44 -0500 Received: from mail-b.sr.ht ([173.195.146.151]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p0QRt-0004lV-Km; Wed, 30 Nov 2022 12:00:43 -0500 Authentication-Results: mail-b.sr.ht; dkim=none Received: from git.sr.ht (unknown [173.195.146.142]) by mail-b.sr.ht (Postfix) with ESMTPSA id AC68C11EF66; Wed, 30 Nov 2022 17:00:35 +0000 (UTC) From: ~axelheider Date: Mon, 14 Nov 2022 13:06:47 +0100 Subject: [PATCH qemu.git 1/1] hw/arm/virt: make second UART available Message-ID: <166982763526.10484.9925072056712598801-1@git.sr.ht> X-Mailer: git.sr.ht In-Reply-To: <166982763526.10484.9925072056712598801-0@git.sr.ht> To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, daniel.thompson@linaro.org MIME-Version: 1.0 Received-SPF: pass client-ip=173.195.146.151; envelope-from=outgoing@sr.ht; helo=mail-b.sr.ht X-Spam_score_int: 36 X-Spam_score: 3.6 X-Spam_bar: +++ X-Spam_report: (3.6 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, FREEMAIL_FORGED_REPLYTO=2.095, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: ~axelheider Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Axel Heider The first UART always always exists. If the security extensions are enabled, the second UART also always exists. Otherwise, it only exists if a backend is configured explicitly via '-serial ', where 'null' creates a dummy backend. This allows enabling the second UART explicitly on demand and does not interfere with any existing setup that just expect one (or two if security extensions are enabled) UARTs. Signed-off-by: Axel Heider --- hw/arm/virt-acpi-build.c | 12 ++++----- hw/arm/virt.c | 55 ++++++++++++++++++++++++++++++---------- include/hw/arm/virt.h | 4 +-- 3 files changed, 49 insertions(+), 22 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 4156111d49..3e1852a1b9 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -482,14 +482,14 @@ build_spcr(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, 0, 3); /* Reserved */ /* Base Address */ build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, - vms->memmap[VIRT_UART].base); + vms->memmap[VIRT_UART0].base); /* Interrupt Type */ build_append_int_noprefix(table_data, (1 << 3) /* Bit[3] ARMH GIC interrupt */, 1); build_append_int_noprefix(table_data, 0, 1); /* IRQ */ /* Global System Interrupt */ build_append_int_noprefix(table_data, - vms->irqmap[VIRT_UART] + ARM_SPI_BASE, 4); + vms->irqmap[VIRT_UART0] + ARM_SPI_BASE, 4); build_append_int_noprefix(table_data, 3 /* 9600 */, 1); /* Baud Rate */ build_append_int_noprefix(table_data, 0 /* No Parity */, 1); /* Parity */ /* Stop Bits */ @@ -673,11 +673,11 @@ build_dbg2(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) /* BaseAddressRegister[] */ build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, - vms->memmap[VIRT_UART].base); + vms->memmap[VIRT_UART0].base); /* AddressSize[] */ build_append_int_noprefix(table_data, - vms->memmap[VIRT_UART].size, 4); + vms->memmap[VIRT_UART0].size, 4); /* NamespaceString[] */ g_array_append_vals(table_data, name, namespace_length); @@ -858,8 +858,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) */ scope = aml_scope("\\_SB"); acpi_dsdt_add_cpus(scope, vms); - acpi_dsdt_add_uart(scope, &memmap[VIRT_UART], - (irqmap[VIRT_UART] + ARM_SPI_BASE)); + acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], + (irqmap[VIRT_UART0] + ARM_SPI_BASE)); if (vmc->acpi_expose_flash) { acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index b871350856..59959c75b0 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -143,11 +143,11 @@ static const MemMapEntry base_memmap[] = { [VIRT_GIC_ITS] = { 0x08080000, 0x00020000 }, /* This redistributor space allows up to 2*64kB*123 CPUs */ [VIRT_GIC_REDIST] = { 0x080A0000, 0x00F60000 }, - [VIRT_UART] = { 0x09000000, 0x00001000 }, + [VIRT_UART0] = { 0x09000000, 0x00001000 }, [VIRT_RTC] = { 0x09010000, 0x00001000 }, [VIRT_FW_CFG] = { 0x09020000, 0x00000018 }, [VIRT_GPIO] = { 0x09030000, 0x00001000 }, - [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 }, + [VIRT_UART1] = { 0x09040000, 0x00001000 }, /* secure UART */ [VIRT_SMMU] = { 0x09050000, 0x00020000 }, [VIRT_PCDIMM_ACPI] = { 0x09070000, MEMORY_HOTPLUG_IO_LEN }, [VIRT_ACPI_GED] = { 0x09080000, ACPI_GED_EVT_SEL_LEN }, @@ -184,11 +184,11 @@ static MemMapEntry extended_memmap[] = { }; static const int a15irqmap[] = { - [VIRT_UART] = 1, + [VIRT_UART0] = 1, [VIRT_RTC] = 2, [VIRT_PCIE] = 3, /* ... to 6 */ [VIRT_GPIO] = 7, - [VIRT_SECURE_UART] = 8, + [VIRT_UART1] = 8, [VIRT_ACPI_GED] = 9, [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */ [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */ @@ -843,6 +843,27 @@ static void create_uart(const VirtMachineState *vms, int uart, MemoryRegion *mem, Chardev *chr) { char *nodename; + /* + * The first UART always always exists. If the security extensions are + * enabled, the second UART also always exists. Otherwise, it only exists + * if a backend is configured explicitly via '-serial ', where + * 'null' creates a dummy backend. This allows enabling the second UART + * explicitly on demand and does not interfere with any existing setup that + * just expect one (or two if security extensions are enabled) UARTs. + */ + switch(uart) { + case VIRT_UART0: + break; + case VIRT_UART1: + if (!vms->secure && !chr) { + return; + } + break; + default: + error_report("unsupported UART ID %d", uart); + exit(1); + } + hwaddr base = vms->memmap[uart].base; hwaddr size = vms->memmap[uart].size; int irq = vms->irqmap[uart]; @@ -854,6 +875,7 @@ static void create_uart(const VirtMachineState *vms, int uart, qdev_prop_set_chr(dev, "chardev", chr); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + /* if security extensions are enabled, 'mem' is 'secure_sysmem' for UART1 */ memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); @@ -873,15 +895,19 @@ static void create_uart(const VirtMachineState *vms, int uart, qemu_fdt_setprop(ms->fdt, nodename, "clock-names", clocknames, sizeof(clocknames)); - if (uart == VIRT_UART) { + switch(uart) { + case VIRT_UART0: qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename); - } else { - /* Mark as not usable by the normal world */ - qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); - - qemu_fdt_setprop_string(ms->fdt, "/secure-chosen", "stdout-path", - nodename); + break; + case VIRT_UART1: + if (vms->secure) { + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); + qemu_fdt_setprop_string(ms->fdt, "/secure-chosen", "stdout-path", + nodename); + } + default: + break; } g_free(nodename); @@ -2222,11 +2248,12 @@ static void machvirt_init(MachineState *machine) fdt_add_pmu_nodes(vms); - create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); + create_uart(vms, VIRT_UART0, sysmem, serial_hd(0)); + create_uart(vms, VIRT_UART1, vms->secure ? secure_sysmem : sysmem, + serial_hd(1)); if (vms->secure) { create_secure_ram(vms, secure_sysmem, secure_tag_sysmem); - create_uart(vms, VIRT_SECURE_UART, secure_sysmem, serial_hd(1)); } if (tag_sysmem) { diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 6ec479ca2b..90563c132b 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -69,7 +69,7 @@ enum { VIRT_GIC_ITS, VIRT_GIC_REDIST, VIRT_SMMU, - VIRT_UART, + VIRT_UART0, VIRT_MMIO, VIRT_RTC, VIRT_FW_CFG, @@ -79,7 +79,7 @@ enum { VIRT_PCIE_ECAM, VIRT_PLATFORM_BUS, VIRT_GPIO, - VIRT_SECURE_UART, + VIRT_UART1, /* secure UART if vms->secure */ VIRT_SECURE_MEM, VIRT_SECURE_GPIO, VIRT_PCDIMM_ACPI,