diff mbox series

[qemu.git,05/11] hw/timer/imx_epit: simplify interrupt logic

Message ID 166718254546.5893.5075929684621857903-5@git.sr.ht
State New
Headers show
Series improve hw/timer/imx_epit | expand

Commit Message

~axelheider Oct. 25, 2022, 11:23 a.m. UTC 
From: Axel Heider <axel.heider@hensoldt.net>

Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
---
 hw/timer/imx_epit.c | 23 +++++++++--------------
 1 file changed, 9 insertions(+), 14 deletions(-)
diff mbox series

Patch

diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
index 37b04a1b53..d21cbf16f6 100644
--- a/hw/timer/imx_epit.c
+++ b/hw/timer/imx_epit.c
@@ -61,18 +61,6 @@  static const IMXClk imx_epit_clocks[] =  {
     CLK_32k,       /* 11 ipg_clk_32k -- ~32kHz */
 };
 
-/*
- * Update interrupt status
- */
-static void imx_epit_update_int(IMXEPITState *s)
-{
-    if (s->sr && (s->cr & CR_OCIEN) && (s->cr & CR_EN)) {
-        qemu_irq_raise(s->irq);
-    } else {
-        qemu_irq_lower(s->irq);
-    }
-}
-
 /*
  * Must be called from within a ptimer_transaction_begin/commit block
  * for both s->timer_cmp and s->timer_reload.
@@ -242,7 +230,7 @@  static void imx_epit_write_sr(IMXEPITState *s, uint32_t value)
     /* writing 1 to OCIF clears the OCIF bit */
     if (value & 0x01) {
         s->sr = 0;
-        imx_epit_update_int(s);
+        qemu_irq_lower(s->irq);
     }
 }
 
@@ -320,7 +308,14 @@  static void imx_epit_cmp(void *opaque)
     DPRINTF("sr was %d\n", s->sr);
 
     s->sr = 1;
-    imx_epit_update_int(s);
+
+    /*
+     * An interrupt is generated only if both the peripheral is enabled and the
+     * interrupt generation is enabled.
+     */
+    if ((s->cr & (CR_EN | CR_OCIEN)) == (CR_EN | CR_OCIEN)) {
+        qemu_irq_raise(s->irq);
+    }
 }
 
 static void imx_epit_reload(void *opaque)