diff mbox series

[v7,10/13] i386: Introduce use_epyc_apic_id_encoding in X86CPUDefinition

Message ID 158396723514.58170.14825482171652019765.stgit@naples-babu.amd.com
State New
Headers show
Series APIC ID fixes for AMD EPYC CPU model | expand

Commit Message

Moger, Babu March 11, 2020, 10:53 p.m. UTC
Add a boolean variable use_epyc_apic_id_encoding in X86CPUDefinition.
This will be set if this cpu model needs to use new EPYC based
apic id encoding.

Override the handlers with EPYC based handlers if use_epyc_apic_id_encoding
is set. This will be done in x86_cpus_init.

Signed-off-by: Babu Moger <babu.moger@amd.com>
---
 target/i386/cpu.c |   16 ++++++++++++++++
 target/i386/cpu.h |    1 +
 2 files changed, 17 insertions(+)

Comments

Igor Mammedov March 12, 2020, 12:26 p.m. UTC | #1
On Wed, 11 Mar 2020 17:53:55 -0500
Babu Moger <babu.moger@amd.com> wrote:

> Add a boolean variable use_epyc_apic_id_encoding in X86CPUDefinition.
> This will be set if this cpu model needs to use new EPYC based
> apic id encoding.
> 
> Override the handlers with EPYC based handlers if use_epyc_apic_id_encoding
> is set. This will be done in x86_cpus_init.
> 
> Signed-off-by: Babu Moger <babu.moger@amd.com>

Acked-by: Igor Mammedov <imammedo@redhat.com>

> ---
>  target/i386/cpu.c |   16 ++++++++++++++++
>  target/i386/cpu.h |    1 +
>  2 files changed, 17 insertions(+)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 7361a53166..1e4400df7a 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1614,6 +1614,10 @@ typedef struct X86CPUDefinition {
>      FeatureWordArray features;
>      const char *model_id;
>      CPUCaches *cache_info;
> +
> +    /* Use AMD EPYC encoding for apic id */
> +    bool use_epyc_apic_id_encoding;
> +
>      /*
>       * Definitions for alternative versions of CPU model.
>       * List is terminated by item with version == 0.
> @@ -1655,6 +1659,18 @@ static const X86CPUVersionDefinition *x86_cpu_def_get_versions(X86CPUDefinition
>      return def->versions ?: default_version_list;
>  }
>  
> +bool cpu_x86_use_epyc_apic_id_encoding(const char *cpu_type)
> +{
> +    X86CPUClass *xcc = X86_CPU_CLASS(object_class_by_name(cpu_type));
> +
> +    assert(xcc);
> +    if (xcc->model && xcc->model->cpudef) {
> +        return xcc->model->cpudef->use_epyc_apic_id_encoding;
> +    } else {
> +        return false;
> +    }
> +}
> +
>  static CPUCaches epyc_cache_info = {
>      .l1d_cache = &(CPUCacheInfo) {
>          .type = DATA_CACHE,
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 7e9e963d78..6e522fcd34 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -1897,6 +1897,7 @@ void cpu_clear_apic_feature(CPUX86State *env);
>  void host_cpuid(uint32_t function, uint32_t count,
>                  uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
>  void host_vendor_fms(char *vendor, int *family, int *model, int *stepping);
> +bool cpu_x86_use_epyc_apic_id_encoding(const char *cpu_type);
>  
>  /* helper.c */
>  bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> 
>
diff mbox series

Patch

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 7361a53166..1e4400df7a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1614,6 +1614,10 @@  typedef struct X86CPUDefinition {
     FeatureWordArray features;
     const char *model_id;
     CPUCaches *cache_info;
+
+    /* Use AMD EPYC encoding for apic id */
+    bool use_epyc_apic_id_encoding;
+
     /*
      * Definitions for alternative versions of CPU model.
      * List is terminated by item with version == 0.
@@ -1655,6 +1659,18 @@  static const X86CPUVersionDefinition *x86_cpu_def_get_versions(X86CPUDefinition
     return def->versions ?: default_version_list;
 }
 
+bool cpu_x86_use_epyc_apic_id_encoding(const char *cpu_type)
+{
+    X86CPUClass *xcc = X86_CPU_CLASS(object_class_by_name(cpu_type));
+
+    assert(xcc);
+    if (xcc->model && xcc->model->cpudef) {
+        return xcc->model->cpudef->use_epyc_apic_id_encoding;
+    } else {
+        return false;
+    }
+}
+
 static CPUCaches epyc_cache_info = {
     .l1d_cache = &(CPUCacheInfo) {
         .type = DATA_CACHE,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 7e9e963d78..6e522fcd34 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1897,6 +1897,7 @@  void cpu_clear_apic_feature(CPUX86State *env);
 void host_cpuid(uint32_t function, uint32_t count,
                 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
 void host_vendor_fms(char *vendor, int *family, int *model, int *stepping);
+bool cpu_x86_use_epyc_apic_id_encoding(const char *cpu_type);
 
 /* helper.c */
 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,