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[RFC,02/66] Hexagon ELF Machine Definition

Message ID 1581381644-13678-3-git-send-email-tsimpson@quicinc.com
State New
Headers show
Series Hexagon patch series | expand

Commit Message

Taylor Simpson Feb. 11, 2020, 12:39 a.m. UTC 
Define EM_HEXAGON 164

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 include/elf.h | 2 ++
 1 file changed, 2 insertions(+)

Comments

Philippe Mathieu-Daudé Feb. 11, 2020, 7:16 a.m. UTC | #1 
On 2/11/20 1:39 AM, Taylor Simpson wrote:
> Define EM_HEXAGON 164
> 
> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
> ---
>   include/elf.h | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/include/elf.h b/include/elf.h
> index 8fbfe60..d51e7d4 100644
> --- a/include/elf.h
> +++ b/include/elf.h
> @@ -170,6 +170,8 @@ typedef struct mips_elf_abiflags_v0 {
>   
>   #define EM_UNICORE32    110     /* UniCore32 */
>   
> +#define EM_HEXAGON     164     /* Qualcomm Hexagon */
> +
>   #define EM_RISCV        243     /* RISC-V */
>   
>   #define EM_NANOMIPS     249     /* Wave Computing nanoMIPS */
> 

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Patch

diff --git a/include/elf.h b/include/elf.h
index 8fbfe60..d51e7d4 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -170,6 +170,8 @@  typedef struct mips_elf_abiflags_v0 {
 
 #define EM_UNICORE32    110     /* UniCore32 */
 
+#define EM_HEXAGON     164     /* Qualcomm Hexagon */
+
 #define EM_RISCV        243     /* RISC-V */
 
 #define EM_NANOMIPS     249     /* Wave Computing nanoMIPS */