From patchwork Mon Aug 19 12:07:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 1149245 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rt-rk.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46BtQt0v5Wz9sMr for ; Mon, 19 Aug 2019 22:24:38 +1000 (AEST) Received: from localhost ([::1]:49188 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hzgiB-0001n0-PP for incoming@patchwork.ozlabs.org; Mon, 19 Aug 2019 08:24:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36239) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hzgTm-00026P-HZ for qemu-devel@nongnu.org; Mon, 19 Aug 2019 08:09:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hzgTl-0002ij-17 for qemu-devel@nongnu.org; Mon, 19 Aug 2019 08:09:42 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:57717 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hzgTk-0002Z5-Lp for qemu-devel@nongnu.org; Mon, 19 Aug 2019 08:09:40 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 41EB11A2077; Mon, 19 Aug 2019 14:08:24 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id DD5A51A205E; Mon, 19 Aug 2019 14:08:23 +0200 (CEST) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 19 Aug 2019 14:07:45 +0200 Message-Id: <1566216496-17375-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1566216496-17375-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1566216496-17375-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v8 06/37] target/mips: Style improvements in cp0_timer.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, philmd@redhat.com, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Aleksandar Markovic Fixes mostly errors and warnings reported by 'checkpatch.pl -f'. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé --- target/mips/cp0_timer.c | 42 +++++++++++++++++++++++------------------- 1 file changed, 23 insertions(+), 19 deletions(-) diff --git a/target/mips/cp0_timer.c b/target/mips/cp0_timer.c index f471639..b5f3560 100644 --- a/target/mips/cp0_timer.c +++ b/target/mips/cp0_timer.c @@ -29,7 +29,7 @@ #define TIMER_PERIOD 10 /* 10 ns period for 100 Mhz frequency */ /* XXX: do not use a global */ -uint32_t cpu_mips_get_random (CPUMIPSState *env) +uint32_t cpu_mips_get_random(CPUMIPSState *env) { static uint32_t seed = 1; static uint32_t prev_idx = 0; @@ -42,8 +42,10 @@ uint32_t cpu_mips_get_random (CPUMIPSState *env) /* Don't return same value twice, so get another value */ do { - /* Use a simple algorithm of Linear Congruential Generator - * from ISO/IEC 9899 standard. */ + /* + * Use a simple algorithm of Linear Congruential Generator + * from ISO/IEC 9899 standard. + */ seed = 1103515245 * seed + 12345; idx = (seed >> 16) % nb_rand_tlb + env->CP0_Wired; } while (idx == prev_idx); @@ -73,7 +75,7 @@ static void cpu_mips_timer_expire(CPUMIPSState *env) qemu_irq_raise(env->irq[(env->CP0_IntCtl >> CP0IntCtl_IPTI) & 0x7]); } -uint32_t cpu_mips_get_count (CPUMIPSState *env) +uint32_t cpu_mips_get_count(CPUMIPSState *env) { if (env->CP0_Cause & (1 << CP0Ca_DC)) { return env->CP0_Count; @@ -91,16 +93,16 @@ uint32_t cpu_mips_get_count (CPUMIPSState *env) } } -void cpu_mips_store_count (CPUMIPSState *env, uint32_t count) +void cpu_mips_store_count(CPUMIPSState *env, uint32_t count) { /* * This gets called from cpu_state_reset(), potentially before timer init. * So env->timer may be NULL, which is also the case with KVM enabled so * treat timer as disabled in that case. */ - if (env->CP0_Cause & (1 << CP0Ca_DC) || !env->timer) + if (env->CP0_Cause & (1 << CP0Ca_DC) || !env->timer) { env->CP0_Count = count; - else { + } else { /* Store new count register */ env->CP0_Count = count - (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / TIMER_PERIOD); @@ -109,13 +111,15 @@ void cpu_mips_store_count (CPUMIPSState *env, uint32_t count) } } -void cpu_mips_store_compare (CPUMIPSState *env, uint32_t value) +void cpu_mips_store_compare(CPUMIPSState *env, uint32_t value) { env->CP0_Compare = value; - if (!(env->CP0_Cause & (1 << CP0Ca_DC))) + if (!(env->CP0_Cause & (1 << CP0Ca_DC))) { cpu_mips_timer_update(env); - if (env->insn_flags & ISA_MIPS32R2) + } + if (env->insn_flags & ISA_MIPS32R2) { env->CP0_Cause &= ~(1 << CP0Ca_TI); + } qemu_irq_lower(env->irq[(env->CP0_IntCtl >> CP0IntCtl_IPTI) & 0x7]); } @@ -131,27 +135,27 @@ void cpu_mips_stop_count(CPUMIPSState *env) TIMER_PERIOD); } -static void mips_timer_cb (void *opaque) +static void mips_timer_cb(void *opaque) { CPUMIPSState *env; env = opaque; -#if 0 - qemu_log("%s\n", __func__); -#endif - if (env->CP0_Cause & (1 << CP0Ca_DC)) + if (env->CP0_Cause & (1 << CP0Ca_DC)) { return; + } - /* ??? This callback should occur when the counter is exactly equal to - the comparator value. Offset the count by one to avoid immediately - retriggering the callback before any virtual time has passed. */ + /* + * ??? This callback should occur when the counter is exactly equal to + * the comparator value. Offset the count by one to avoid immediately + * retriggering the callback before any virtual time has passed. + */ env->CP0_Count++; cpu_mips_timer_expire(env); env->CP0_Count--; } -void cpu_mips_clock_init (MIPSCPU *cpu) +void cpu_mips_clock_init(MIPSCPU *cpu) { CPUMIPSState *env = &cpu->env;