@@ -7388,7 +7388,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_20:
switch (sel) {
- case 0:
+ case CP0_REG20__XCONTEXT:
#if defined(TARGET_MIPS64)
check_insn(ctx, ISA_MIPS3);
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_XContext));
@@ -8127,7 +8127,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_20:
switch (sel) {
- case 0:
+ case CP0_REG20__XCONTEXT:
#if defined(TARGET_MIPS64)
check_insn(ctx, ISA_MIPS3);
gen_helper_mtc0_xcontext(cpu_env, arg);
@@ -8872,7 +8872,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_20:
switch (sel) {
- case 0:
+ case CP0_REG20__XCONTEXT:
check_insn(ctx, ISA_MIPS3);
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_XContext));
register_name = "XContext";
@@ -9593,7 +9593,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_20:
switch (sel) {
- case 0:
+ case CP0_REG20__XCONTEXT:
check_insn(ctx, ISA_MIPS3);
gen_helper_mtc0_xcontext(cpu_env, arg);
register_name = "XContext";