From patchwork Thu Feb 21 18:53:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 1046372 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rt-rk.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4453Yt21SRz9s8m for ; Fri, 22 Feb 2019 05:54:57 +1100 (AEDT) Received: from localhost ([127.0.0.1]:36792 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gwtUl-0004gB-E9 for incoming@patchwork.ozlabs.org; Thu, 21 Feb 2019 13:54:55 -0500 Received: from eggs.gnu.org ([209.51.188.92]:51222) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gwtTz-0004Yd-KJ for qemu-devel@nongnu.org; Thu, 21 Feb 2019 13:54:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gwtTy-0005Qr-KS for qemu-devel@nongnu.org; Thu, 21 Feb 2019 13:54:07 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:34718 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gwtTy-0005IU-9a for qemu-devel@nongnu.org; Thu, 21 Feb 2019 13:54:06 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id E199A1A455E; Thu, 21 Feb 2019 19:53:47 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id BB5E51A453F; Thu, 21 Feb 2019 19:53:47 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Thu, 21 Feb 2019 19:53:36 +0100 Message-Id: <1550775220-26797-5-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1550775220-26797-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1550775220-26797-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 4/8] tests/tcg: target/mips: Add wrappers for MSA integer compare instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Aleksandar Markovic Add wrappers for MSA integer compare instructions. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo --- tests/tcg/mips/include/wrappers_msa.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 7a77fb9..3280f9b 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -97,5 +97,30 @@ DO_MSA__WD__WS_WT(NOR_V, nor.v) DO_MSA__WD__WS_WT(OR_V, or.v) DO_MSA__WD__WS_WT(XOR_V, xor.v) +DO_MSA__WD__WS_WT(CEQ_B, ceq.b) +DO_MSA__WD__WS_WT(CEQ_H, ceq.h) +DO_MSA__WD__WS_WT(CEQ_W, ceq.w) +DO_MSA__WD__WS_WT(CEQ_D, ceq.d) + +DO_MSA__WD__WS_WT(CLE_S_B, cle_s.b) +DO_MSA__WD__WS_WT(CLE_S_H, cle_s.h) +DO_MSA__WD__WS_WT(CLE_S_W, cle_s.w) +DO_MSA__WD__WS_WT(CLE_S_D, cle_s.d) + +DO_MSA__WD__WS_WT(CLE_U_B, cle_u.b) +DO_MSA__WD__WS_WT(CLE_U_H, cle_u.h) +DO_MSA__WD__WS_WT(CLE_U_W, cle_u.w) +DO_MSA__WD__WS_WT(CLE_U_D, cle_u.d) + +DO_MSA__WD__WS_WT(CLT_S_B, clt_s.b) +DO_MSA__WD__WS_WT(CLT_S_H, clt_s.h) +DO_MSA__WD__WS_WT(CLT_S_W, clt_s.w) +DO_MSA__WD__WS_WT(CLT_S_D, clt_s.d) + +DO_MSA__WD__WS_WT(CLT_U_B, clt_u.b) +DO_MSA__WD__WS_WT(CLT_U_H, clt_u.h) +DO_MSA__WD__WS_WT(CLT_U_W, clt_u.w) +DO_MSA__WD__WS_WT(CLT_U_D, clt_u.d) + #endif