From patchwork Mon Oct 29 15:20:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 990325 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rt-rk.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42kJmB4FcBz9s3Z for ; Tue, 30 Oct 2018 02:43:38 +1100 (AEDT) Received: from localhost ([::1]:46336 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gH9hY-0004sp-6P for incoming@patchwork.ozlabs.org; Mon, 29 Oct 2018 11:43:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34430) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gH9Lh-0008Sy-2s for qemu-devel@nongnu.org; Mon, 29 Oct 2018 11:21:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gH9Lc-0003QM-G7 for qemu-devel@nongnu.org; Mon, 29 Oct 2018 11:21:00 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:39524 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gH9Lb-0003IJ-Tr for qemu-devel@nongnu.org; Mon, 29 Oct 2018 11:20:56 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id DA0831A2408; Mon, 29 Oct 2018 16:20:25 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id AA94A1A23CF; Mon, 29 Oct 2018 16:20:25 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 29 Oct 2018 16:20:10 +0100 Message-Id: <1540826418-5501-20-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540826418-5501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540826418-5501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 19/27] target/mips: Add emulation of MXU instructions S32LDD and S32LDDR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Craig Janeczek Add support for emulating the S32LDD and S32LDDR MXU instructions. Reviewed-by: Aleksandar Markovic Signed-off-by: Craig Janeczek Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 54 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 47 insertions(+), 7 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index cc428be..15027b1 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24416,6 +24416,52 @@ static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx) tcg_temp_free(t7); } +/* + * S32LDD XRa, Rb, S12 - Load a word from memory to XRF + * S32LDDR XRa, Rb, S12 - Load a word from memory to XRF, reversed byte seq. + */ +static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx) +{ + TCGv t0, t1; + TCGLabel *l0; + uint32_t XRa, Rb, s12, sel; + + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); + + l0 = gen_new_label(); + + XRa = extract32(ctx->opcode, 6, 4); + s12 = extract32(ctx->opcode, 10, 10); + sel = extract32(ctx->opcode, 20, 1); + Rb = extract32(ctx->opcode, 21, 5); + + gen_load_mxu_cr(t0); + tcg_gen_andi_tl(t0, t0, MXU_CR_MXU_EN); + tcg_gen_brcondi_tl(TCG_COND_NE, t0, MXU_CR_MXU_EN, l0); + + gen_load_gpr(t0, Rb); + + tcg_gen_movi_tl(t1, s12); + tcg_gen_shli_tl(t1, t1, 2); + if (s12 & 0x200) { + tcg_gen_ori_tl(t1, t1, 0xFFFFF000); + } + tcg_gen_add_tl(t1, t0, t1); + tcg_gen_qemu_ld_tl(t1, t1, ctx->mem_idx, MO_SL); + + if (sel == 1) { + /* S32LDDR */ + tcg_gen_bswap32_tl(t1, t1); + } + gen_store_mxu_gpr(t1, XRa); + + gen_set_label(l0); + + tcg_temp_free(t0); + tcg_temp_free(t1); +} + /* * Decoding engine for MXU @@ -24645,14 +24691,8 @@ static void decode_opc_mxu__pool04(CPUMIPSState *env, DisasContext *ctx) switch (opcode) { case OPC_MXU_S32LDD: - /* TODO: Implement emulation of S32LDD instruction. */ - MIPS_INVAL("OPC_MXU_S32LDD"); - generate_exception_end(ctx, EXCP_RI); - break; case OPC_MXU_S32LDDR: - /* TODO: Implement emulation of S32LDDR instruction. */ - MIPS_INVAL("OPC_MXU_S32LDDR"); - generate_exception_end(ctx, EXCP_RI); + gen_mxu_s32ldd_s32lddr(ctx); break; default: MIPS_INVAL("decode_opc_mxu");