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[v6,09/18] target/mips: Add bit encoding for MXU operand getting pattern 'optn2'

Message ID 1540311509-23970-10-git-send-email-aleksandar.markovic@rt-rk.com
State New
Headers show
Series target/mips: Add limited support for Ingenic's MXU ASE | expand

Commit Message

Aleksandar Markovic Oct. 23, 2018, 4:18 p.m. UTC 
From: Craig Janeczek <jancraig@amazon.com>

Add bit encoding for MXU operand getting pattern 'optn2'.

Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 6 ++++++
 1 file changed, 6 insertions(+)
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Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 665a584..f3e87ce 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -23861,6 +23861,12 @@  static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
 #define MXU_EPTN2_SA    2
 #define MXU_EPTN2_SS    3
 
+/* MXU operand getting pattern 'optn2' */
+#define MXU_OPTN2_WW    0
+#define MXU_OPTN2_LW    1
+#define MXU_OPTN2_HW    2
+#define MXU_OPTN2_XW    3
+
 
 /*
  *