Message ID | 1534789014-8310-5-git-send-email-aleksandar.markovic@rt-rk.com |
---|---|
State | New |
Headers | show |
Series | Add nanoMIPS support - core functionality and system mode | expand |
> From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com> > Sent: Monday, August 20, 2018 8:16 PM > > Subject: [PATCH v11 04/46] target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS > > From: Stefan Markovic <smarkovic@wavecomp.com> > > Only if Config3.ISA is 3 (microMIPS), the mode should be switched in > cpu_state_reset(). Config3.ISA is 1 for nanoMIPS processors, and no mode > change should happen. > > Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> > --- > target/mips/translate.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
diff --git a/target/mips/translate.c b/target/mips/translate.c index 4f95b9a..7fb322b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -21841,8 +21841,8 @@ void cpu_state_reset(CPUMIPSState *env) env->CP0_Status |= (1 << CP0St_FR); } - if (env->CP0_Config3 & (1 << CP0C3_ISA)) { - /* microMIPS on reset when Config3.ISA == {1, 3} */ + if (env->CP0_Config3 & (1 << CP0C3_ISA) & (1 << (CP0C3_ISA + 1))) { + /* microMIPS on reset when Config3.ISA is 3 */ env->hflags |= MIPS_HFLAG_M16; }