diff mbox series

[v9,43/84] target/mips: Add emulation of DSP ASE for nanoMIPS - part 2

Message ID 1534431497-1385-44-git-send-email-aleksandar.markovic@rt-rk.com
State New
Headers show
Series Add nanoMIPS support to QEMU | expand

Commit Message

Aleksandar Markovic Aug. 16, 2018, 2:57 p.m. UTC 
From: Stefan Markovic <smarkovic@wavecomp.com>

Add emulation of DSP ASE instructions for nanoMIPS - part 2.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
---
 target/mips/translate.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Richard Henderson Aug. 16, 2018, 4:42 p.m. UTC | #1 
On 08/16/2018 07:57 AM, Aleksandar Markovic wrote:
> +                        gen_compute_branch(ctx, OPC_BPOSGE32, 4, -1, -2,
> +                                           imm, 4);

gen_compute_compact_branch_nm, or something.


r~
diff mbox series

Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 305bb6c..94c2758 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -19152,6 +19152,16 @@  static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
                 case NM_BC1NEZC:
                     gen_compute_branch1_r6(ctx, OPC_BC1NEZ, rt, s, 0);
                     break;
+                case NM_BPOSGE32C:
+                    check_dspr2(ctx);
+                    {
+                        int32_t imm = extract32(ctx->opcode, 1, 13) |
+                                      extract32(ctx->opcode, 0, 1) << 13;
+
+                        gen_compute_branch(ctx, OPC_BPOSGE32, 4, -1, -2,
+                                           imm, 4);
+                    }
+                    break;
                 default:
                     generate_exception_end(ctx, EXCP_RI);
                     break;