From patchwork Wed Apr 4 23:11:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 895190 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=braap.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=braap.org header.i=@braap.org header.b="QiuSCDFH"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="JsyW2cGo"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40Ghdc63b1z9ry1 for ; Thu, 5 Apr 2018 09:15:31 +1000 (AEST) Received: from localhost ([::1]:37792 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f3rcm-0006hG-UZ for incoming@patchwork.ozlabs.org; Wed, 04 Apr 2018 19:15:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54521) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f3rZe-0004O0-Oo for qemu-devel@nongnu.org; Wed, 04 Apr 2018 19:12:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f3rZd-00045t-9V for qemu-devel@nongnu.org; Wed, 04 Apr 2018 19:12:14 -0400 Received: from out5-smtp.messagingengine.com ([66.111.4.29]:38979) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f3rZd-00045i-4c for qemu-devel@nongnu.org; Wed, 04 Apr 2018 19:12:13 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 12B3A21B5B; Wed, 4 Apr 2018 19:11:18 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Wed, 04 Apr 2018 19:11:18 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=tqTTzuy/aZFKfJ +dTegM5cJn8TUpW4Lq6DQ+DflTz70=; b=QiuSCDFHNewvvGLmwNINLpgsfFBWit D+2SxVSNMkN2Uwt+VD2Dr+gCvyHICnPNENNo7BWib6tQ2Cxd3q2mXvj5SGauTe1V /qXu3KTInUHndaZgCdSd3sT2/kqnl7/9GYKqXLvBD+WvkFEfR6J2BZCkdMGQsQkG foCEl7Okuuhas= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=tqTTzuy/aZFKfJ+dTegM5cJn8TUpW4Lq6DQ+DflTz70=; b=JsyW2cGo qxJne9ajQkH06EKYHwP4GH/mwPVMx80S8wRlmz9SZhgEVZpRPW1n27wJNIt84CgS 3CQi63mBPC9uEunZK74BGZS8AAL2Dq58BeJ74wTQ+DIIip2b12PTlPUMCHask0s+ X6yIB+UKBVQyHPmmkmqfuoBvdZwYdA50OQX+YOPb1yjGQq4ZjkT9bDfEhax1JouE G5t+6sxK/vnscnBhWeg1u/44Q8TUEfOXkNSx9oqQ02RDM1LZjOJXvCw8d9FQaIrW x2ZypQYWWyBnGX1GKEHjTKi07oYCf0+Lss8gfd5jcGoEgXfOgXuLqnK9+qN8D83o zL124cPDtb5srA== X-ME-Sender: Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id B5EBF10259; Wed, 4 Apr 2018 19:11:17 -0400 (EDT) From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Wed, 4 Apr 2018 19:11:10 -0400 Message-Id: <1522883475-27858-11-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522883475-27858-1-git-send-email-cota@braap.org> References: <1522883475-27858-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.29 Subject: [Qemu-devel] [PATCH v3 10/15] hardfloat: support float32/64 addition and subtraction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Mark Cave-Ayland , Richard Henderson , Laurent Vivier , Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Performance results (single and double precision) for fp-bench: 1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz - before: add-single: 135.07 MFlops add-double: 131.60 MFlops sub-single: 130.04 MFlops sub-double: 133.01 MFlops - after: add-single: 443.04 MFlops add-double: 301.95 MFlops sub-single: 411.36 MFlops sub-double: 293.15 MFlops 2. ARM Aarch64 A57 @ 2.4GHz - before: add-single: 44.79 MFlops add-double: 49.20 MFlops sub-single: 44.55 MFlops sub-double: 49.06 MFlops - after: add-single: 93.28 MFlops add-double: 88.27 MFlops sub-single: 91.47 MFlops sub-double: 88.27 MFlops 3. IBM POWER8E @ 2.1 GHz - before: add-single: 72.59 MFlops add-double: 72.27 MFlops sub-single: 75.33 MFlops sub-double: 70.54 MFlops - after: add-single: 112.95 MFlops add-double: 201.11 MFlops sub-single: 116.80 MFlops sub-double: 188.72 MFlops Note that the IBM and ARM machines benefit from having HARDFLOAT_2F{32,64}_USE_FP set to 0. Otherwise their performance can suffer significantly: - IBM Power8: add-single: [1] 54.94 vs [0] 116.37 MFlops add-double: [1] 58.92 vs [0] 201.44 MFlops - Aarch64 A57: add-single: [1] 80.72 vs [0] 93.24 MFlops add-double: [1] 82.10 vs [0] 88.18 MFlops On the Intel machine, having 2F64 set to 1 pays off, but it doesn't for 2F32: - Intel i7-6700K: add-single: [1] 285.79 vs [0] 426.70 MFlops add-double: [1] 302.15 vs [0] 278.82 MFlops Signed-off-by: Emilio G. Cota --- fpu/softfloat.c | 106 +++++++++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 98 insertions(+), 8 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 956b938..ca0b8ab 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1080,8 +1080,8 @@ float16 __attribute__((flatten)) float16_add(float16 a, float16 b, return float16_round_pack_canonical(pr, status); } -float32 __attribute__((flatten)) float32_add(float32 a, float32 b, - float_status *status) +static float32 QEMU_SOFTFLOAT_ATTR +soft_float32_add(float32 a, float32 b, float_status *status) { FloatParts pa = float32_unpack_canonical(a, status); FloatParts pb = float32_unpack_canonical(b, status); @@ -1090,8 +1090,8 @@ float32 __attribute__((flatten)) float32_add(float32 a, float32 b, return float32_round_pack_canonical(pr, status); } -float64 __attribute__((flatten)) float64_add(float64 a, float64 b, - float_status *status) +static float64 QEMU_SOFTFLOAT_ATTR +soft_float64_add(float64 a, float64 b, float_status *status) { FloatParts pa = float64_unpack_canonical(a, status); FloatParts pb = float64_unpack_canonical(b, status); @@ -1110,8 +1110,8 @@ float16 __attribute__((flatten)) float16_sub(float16 a, float16 b, return float16_round_pack_canonical(pr, status); } -float32 __attribute__((flatten)) float32_sub(float32 a, float32 b, - float_status *status) +static float32 QEMU_SOFTFLOAT_ATTR +soft_float32_sub(float32 a, float32 b, float_status *status) { FloatParts pa = float32_unpack_canonical(a, status); FloatParts pb = float32_unpack_canonical(b, status); @@ -1120,8 +1120,8 @@ float32 __attribute__((flatten)) float32_sub(float32 a, float32 b, return float32_round_pack_canonical(pr, status); } -float64 __attribute__((flatten)) float64_sub(float64 a, float64 b, - float_status *status) +static float64 QEMU_SOFTFLOAT_ATTR +soft_float64_sub(float64 a, float64 b, float_status *status) { FloatParts pa = float64_unpack_canonical(a, status); FloatParts pb = float64_unpack_canonical(b, status); @@ -1130,6 +1130,96 @@ float64 __attribute__((flatten)) float64_sub(float64 a, float64 b, return float64_round_pack_canonical(pr, status); } +static float float_add(float a, float b) +{ + return a + b; +} + +static float float_sub(float a, float b) +{ + return a - b; +} + +static double double_add(double a, double b) +{ + return a + b; +} + +static double double_sub(double a, double b) +{ + return a - b; +} + +static bool f32_addsub_post(float32 a, float32 b, const struct float_status *s) +{ + return !(float32_is_zero(a) && float32_is_zero(b)); +} + +static bool +float_addsub_post(float a, float b, const struct float_status *s) +{ + return !(fpclassify(a) == FP_ZERO && fpclassify(b) == FP_ZERO); +} + +static bool f64_addsub_post(float64 a, float64 b, const struct float_status *s) +{ + return !(float64_is_zero(a) && float64_is_zero(b)); +} + +static bool +double_addsub_post(double a, double b, const struct float_status *s) +{ + return !(fpclassify(a) == FP_ZERO && fpclassify(b) == FP_ZERO); +} + +static float32 float32_addsub(float32 a, float32 b, float_status *s, + float_op2_func_t hard, f32_op2_func_t soft) +{ + if (QEMU_HARDFLOAT_2F32_USE_FP) { + return float_gen2(a, b, s, hard, soft, float_is_zon2, float_addsub_post, + NULL, NULL); + } else { + return f32_gen2(a, b, s, hard, soft, f32_is_zon2, f32_addsub_post, + NULL, NULL); + } +} + +static float64 float64_addsub(float64 a, float64 b, float_status *s, + double_op2_func_t hard, f64_op2_func_t soft) +{ + if (QEMU_HARDFLOAT_2F64_USE_FP) { + return double_gen2(a, b, s, hard, soft, double_is_zon2, + double_addsub_post, NULL, NULL); + } else { + return f64_gen2(a, b, s, hard, soft, f64_is_zon2, f64_addsub_post, + NULL, NULL); + } +} + +float32 __attribute__((flatten)) +float32_add(float32 a, float32 b, float_status *s) +{ + return float32_addsub(a, b, s, float_add, soft_float32_add); +} + +float32 __attribute__((flatten)) +float32_sub(float32 a, float32 b, float_status *s) +{ + return float32_addsub(a, b, s, float_sub, soft_float32_sub); +} + +float64 __attribute__((flatten)) +float64_add(float64 a, float64 b, float_status *s) +{ + return float64_addsub(a, b, s, double_add, soft_float64_add); +} + +float64 __attribute__((flatten)) +float64_sub(float64 a, float64 b, float_status *s) +{ + return float64_addsub(a, b, s, double_sub, soft_float64_sub); +} + /* * Returns the result of multiplying the floating-point values `a' and * `b'. The operation is performed according to the IEC/IEEE Standard