From patchwork Mon Feb 5 06:22:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Clark X-Patchwork-Id: 869173 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.b="JUlQfdzu"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zZdHp1cjkz9s7M for ; Mon, 5 Feb 2018 17:40:05 +1100 (AEDT) Received: from localhost ([::1]:59443 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eiaRe-0002L3-Dl for incoming@patchwork.ozlabs.org; Mon, 05 Feb 2018 01:40:02 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58616) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eiaDE-0005mI-7G for qemu-devel@nongnu.org; Mon, 05 Feb 2018 01:25:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eiaDC-0006zl-Mb for qemu-devel@nongnu.org; Mon, 05 Feb 2018 01:25:08 -0500 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:44334) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eiaDC-0006zE-EZ for qemu-devel@nongnu.org; Mon, 05 Feb 2018 01:25:06 -0500 Received: by mail-pg0-x244.google.com with SMTP id r1so2072512pgn.11 for ; Sun, 04 Feb 2018 22:25:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bUmoRH4TMHNKhKU9PUuJjuiGAS4pwabFq3FzTmc5PpM=; b=JUlQfdzud4SD1TK77rgWGXwpLqyhfgYaHtuPrplCEYmT6QwEJMwfrLGiic6zRs2FZ+ /BSpou1Vz545y79tk+JbqQNYWt6dNzep7u4LpY4/xXYT//pNI5xTh4z+LMVCbpbZYKBx 5ufnHoywgohia/cT/aZgcl8ni0usAk4PKiSm/YGyWyio1zaaRE3Hz9H4qJE6UDGInzOH 6e2/Q2/j83Vk6fT4HKS7dIpwUrno32ZsdnEjJQOXN/fRgUZs7xrAf/m9TcMWqtcsnGTm nD3uHZbwGlf4MGNKkP3in5yg6ICIxY6gX6QVQvbic4TRX71if16yiC1QEC/kAtO3U9zt C75w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bUmoRH4TMHNKhKU9PUuJjuiGAS4pwabFq3FzTmc5PpM=; b=da57B0xPoTYgSddDfpnM/+QuqvtGWuyBtWTiHaD+54EghILfQYGeB/u891c6JgaWf1 ZgF4Ld2IduXoaGYEHz4XFO8AJebTdPZlqnkPR/APZWXuuNWAQJBTttLK8G7o7Hs7VeXx 8DE0nGdLY1X91Vat5qsJ95YzdzBF8MyVDIiJdlye1YF9oiNzLcTuOME9JDKobqU0b4i5 8Ug45NqHcmvkaSMH/bqiTKVnIn1JVAJleYDMEffLxNSiKtWbFDGo7wv/3yJzI79+qd+U 8JL+nx2dbWVKkkNDTNyTy50G3wenf/c3JnSDDKoPsQbHvP5lhaXTGTGZr2VrhN6p1UYa slhA== X-Gm-Message-State: AKwxytcskU8INlro/E3kLGXzbyjg8aByvDOhNxZ82EYlOXYnUhGqbjQW fuoXwC+XCAObMik/M3eVlgXAxRI3h7s= X-Google-Smtp-Source: AH8x224uKnRNajOP01nYIuYQ4u6/onVAKahYnO6JF+pI0/GuJz8vCaeHGjEF1QlEvRcSo4uQVkUyCQ== X-Received: by 10.98.6.130 with SMTP id 124mr48039406pfg.117.1517811905427; Sun, 04 Feb 2018 22:25:05 -0800 (PST) Received: from localhost.localdomain (125-237-39-90.jetstream.xtra.co.nz. [125.237.39.90]) by smtp.gmail.com with ESMTPSA id e82sm9517915pfh.53.2018.02.04.22.25.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 04 Feb 2018 22:25:04 -0800 (PST) From: Michael Clark To: qemu-devel@nongnu.org Date: Mon, 5 Feb 2018 19:22:44 +1300 Message-Id: <1517811767-75958-19-git-send-email-mjc@sifive.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1517811767-75958-1-git-send-email-mjc@sifive.com> References: <1517811767-75958-1-git-send-email-mjc@sifive.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v4 19/22] SiFive RISC-V Test Finisher X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann , Michael Clark , Palmer Dabbelt , Sagar Karandikar , RISC-V Patches Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Test finisher memory mapped device used to exit simulation. Signed-off-by: Michael Clark --- hw/riscv/sifive_test.c | 99 ++++++++++++++++++++++++++++++++++++++++++ include/hw/riscv/sifive_test.h | 48 ++++++++++++++++++++ 2 files changed, 147 insertions(+) create mode 100644 hw/riscv/sifive_test.c create mode 100644 include/hw/riscv/sifive_test.h diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c new file mode 100644 index 0000000..9696f15 --- /dev/null +++ b/hw/riscv/sifive_test.c @@ -0,0 +1,99 @@ +/* + * QEMU SiFive Test Finisher + * + * Copyright (c) 2018 SiFive, Inc. + * + * Test finisher memory mapped device used to exit simulation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "target/riscv/cpu.h" +#include "hw/riscv/sifive_test.h" + +static uint64_t sifive_test_read(void *opaque, hwaddr addr, unsigned int size) +{ + return 0; +} + +static void sifive_test_write(void *opaque, hwaddr addr, + uint64_t val64, unsigned int size) +{ + if (addr == 0) { + int status = val64 & 0xffff; + int code = (val64 >> 16) & 0xffff; + switch (status) { + case FINISHER_FAIL: + exit(code); + case FINISHER_PASS: + exit(0); + default: + break; + } + } + hw_error("%s: write: addr=0x%x val=0x%016" PRIx64 "\n", + __func__, (int)addr, val64); +} + +static const MemoryRegionOps sifive_test_ops = { + .read = sifive_test_read, + .write = sifive_test_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4 + } +}; + +static void sifive_test_init(Object *obj) +{ + SiFiveTestState *s = SIFIVE_TEST(obj); + + memory_region_init_io(&s->mmio, obj, &sifive_test_ops, s, + TYPE_SIFIVE_TEST, 0x1000); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); +} + +static const TypeInfo sifive_test_info = { + .name = TYPE_SIFIVE_TEST, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(SiFiveTestState), + .instance_init = sifive_test_init, +}; + +static void sifive_test_register_types(void) +{ + type_register_static(&sifive_test_info); +} + +type_init(sifive_test_register_types) + + +/* + * Create Test device. + */ +DeviceState *sifive_test_create(hwaddr addr) +{ + DeviceState *dev = qdev_create(NULL, TYPE_SIFIVE_TEST); + qdev_init_nofail(dev); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); + return dev; +} diff --git a/include/hw/riscv/sifive_test.h b/include/hw/riscv/sifive_test.h new file mode 100644 index 0000000..6a0f5bb --- /dev/null +++ b/include/hw/riscv/sifive_test.h @@ -0,0 +1,48 @@ +/* + * QEMU Test Finisher interface + * + * Copyright (c) 2018 SiFive, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef HW_SIFIVE_TEST_H +#define HW_SIFIVE_TEST_H + +#define TYPE_SIFIVE_TEST "riscv.sifive.test" + +#define SIFIVE_TEST(obj) \ + OBJECT_CHECK(SiFiveTestState, (obj), TYPE_SIFIVE_TEST) + +typedef struct SiFiveTestState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion mmio; +} SiFiveTestState; + +enum { + FINISHER_FAIL = 0x3333, + FINISHER_PASS = 0x5555 +}; + +DeviceState *sifive_test_create(hwaddr addr); + +#endif