From patchwork Fri Oct 20 15:41:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriel Costa X-Patchwork-Id: 828784 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="p73n7u59"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yJbt34TYQz9t42 for ; Sat, 21 Oct 2017 06:47:22 +1100 (AEDT) Received: from localhost ([::1]:55458 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e5dGI-0000DA-9i for incoming@patchwork.ozlabs.org; Fri, 20 Oct 2017 15:47:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41367) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e5dEh-0007Zb-JN for qemu-devel@nongnu.org; Fri, 20 Oct 2017 15:45:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e5dEe-00078j-Fc for qemu-devel@nongnu.org; Fri, 20 Oct 2017 15:45:39 -0400 Received: from mail-qt0-x241.google.com ([2607:f8b0:400d:c0d::241]:53674) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e5dEe-00077x-9o for qemu-devel@nongnu.org; Fri, 20 Oct 2017 15:45:36 -0400 Received: by mail-qt0-x241.google.com with SMTP id n61so19802693qte.10 for ; Fri, 20 Oct 2017 12:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=AztaeTIGeXOGNNLEpG1g5Vjw9SJT6OIi81By/n1iF60=; b=p73n7u598dK/Uo0df8zo4NMHhUll4bjZFTmqrS3XzP1DcxTDc7LYGQj4p90Fgu3tna nqFd5Esdk08XNgc88KXEpCBiW9qUqt1jC7xoWyZJ0hWtqDCJ/a95rNRmBB+pRxLvG4MC M6Yi67qw176DBxuqXNz13wos++9rU8cabE3aPdeK5tbLhFomDFN7qdC1VqM2MV5n61hu UTuPIdAUCE7AbaacJgBbjtvQpa3CQHotPHm4PudrFkcqFn/94IOJBuUP2MNhaF4ITCz+ vF+Fg+UE8gqbwyJ8kyH+TickNMHloox+5IYWZhuo4pMGv3emLLDT0Kb+N4ZWXxFvB8/m 1Wmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=AztaeTIGeXOGNNLEpG1g5Vjw9SJT6OIi81By/n1iF60=; b=J49opsY+uSFaK9OAkfC4lSbxK/ACEtVKqQ8H/z/mILeHojYrcIdM3xsuEoVP3Ttj5Q kzvFxOi+sGcntTfCyel9yVmDcQtPNOqvcp5qVGxEB33/Lq6nKTvrBXS7tqiMIOnDjjle 49mSnDN2rQimgp9mImd5STQ4KYNsd6JIwwDG6FianL+JmbKBZlP/8KTftcq+jOF4ClOn yvord2nXTwVcIykUqBAtMid7VuCpKmogQfDW+peDhKvSMTdhRUgQhBwYGquHkMbJxMCT WUvPLhMO2j0EGjrDJIbgiHXaFI2ADAhvKBBRQy5cxZ012odwyRJiAesMVCG4WY8708K8 o4pQ== X-Gm-Message-State: AMCzsaUfSBnkFE6zwsbToWJdbLCeqj6OcnUgfEk+o5wYe7R86pces2fs TqvGd64ByJDrQxsa6OKd+nwfgwsW X-Google-Smtp-Source: ABhQp+SeZtRsRT70gQpiWo/e9D2GE6GOz1j953k412bHxJi+vuW7tgzFVVt1TrS2iBCxBRq8j6Hf2Q== X-Received: by 10.200.22.181 with SMTP id r50mr9631171qtj.137.1508528735508; Fri, 20 Oct 2017 12:45:35 -0700 (PDT) Received: from localhost.localdomain ([208.94.106.99]) by smtp.gmail.com with ESMTPSA id 64sm1070419qkz.51.2017.10.20.12.45.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Oct 2017 12:45:34 -0700 (PDT) From: Gabriel Augusto Costa To: qemu-devel@nongnu.org Date: Fri, 20 Oct 2017 11:41:19 -0400 Message-Id: <1508514079-15830-1-git-send-email-gabriel291075@gmail.com> X-Mailer: git-send-email 2.1.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::241 Subject: [Qemu-devel] [PATCH v3 07/11] kinetis_k64_mcg.c has been added X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" I made a new arm machine with some peripherals. The machine is mk64fn1m0, a cortex-m4 microcontroller from NXP Kinetis family. The machine can run a simple arm binary file using UART0 in polling mode. I have prepared a series of patchs to include this machine: PATCH v3 n/11: It adds the machine and peripherals devices; PATCH v4 n/2: It changes the Make files to compile this machine. Signed-off-by: Gabriel Augusto Costa --- hw/misc/kinetis_k64_mcg.c | 221 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 221 insertions(+) create mode 100644 hw/misc/kinetis_k64_mcg.c diff --git a/hw/misc/kinetis_k64_mcg.c b/hw/misc/kinetis_k64_mcg.c new file mode 100644 index 0000000..d768f06 --- /dev/null +++ b/hw/misc/kinetis_k64_mcg.c @@ -0,0 +1,221 @@ +/* + * Kinetis K64 peripheral microcontroller emulation. + * + * Copyright (c) 2017 Advantech Wireless + * Written by Gabriel Costa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +/* Kinetis K64 series MCG controller. */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/sysbus.h" +#include "hw/ssi/ssi.h" +#include "hw/arm/arm.h" +#include "hw/devices.h" +#include "qemu/timer.h" +#include "net/net.h" +#include "hw/boards.h" +#include "qemu/log.h" +#include "exec/address-spaces.h" +#include "sysemu/sysemu.h" +#include "hw/char/pl011.h" +#include "hw/misc/unimp.h" +#include "hw/misc/kinetis_k64_mcg.h" + +static const VMStateDescription vmstate_kinetis_k64_mcg = { + .name = TYPE_KINETIS_K64_MCG, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT8(C1, kinetis_k64_mcg_state), + VMSTATE_UINT8(C2, kinetis_k64_mcg_state), + VMSTATE_UINT8(C3, kinetis_k64_mcg_state), + VMSTATE_UINT8(C4, kinetis_k64_mcg_state), + VMSTATE_UINT8(C5, kinetis_k64_mcg_state), + VMSTATE_UINT8(C6, kinetis_k64_mcg_state), + VMSTATE_UINT8(S, kinetis_k64_mcg_state), + VMSTATE_UINT8(SC, kinetis_k64_mcg_state), + VMSTATE_UINT8(ATCVH, kinetis_k64_mcg_state), + VMSTATE_UINT8(ATCVL, kinetis_k64_mcg_state), + VMSTATE_UINT8(C7, kinetis_k64_mcg_state), + VMSTATE_UINT8(C8, kinetis_k64_mcg_state), + VMSTATE_END_OF_LIST() + } +}; + +static void kinetis_k64_mcg_reset(DeviceState *dev) +{ + kinetis_k64_mcg_state *s = KINETIS_K64_MCG(dev); + + s->C1 = 0x04; + s->C2 = 0x80; + s->C3 = 0x00; + s->C4 = 0x00; + s->C5 = 0x00; + s->C6 = 0x00; + s->S = 0x10; + s->SC = 0x02; + s->ATCVH = 0x00; + s->ATCVL = 0x00; + s->C7 = 0x00; + s->C8 = 0x80; +} + +static void kinetis_k64_mcg_write(void *opaque, hwaddr offset, uint64_t value, + unsigned size) +{ + kinetis_k64_mcg_state *s = (kinetis_k64_mcg_state *)opaque; + + value &= 0xFF; + + switch (offset) { + case 0x00: + if (value & 1 << 2) { /*IREFS*/ + s->S = 0; + s->S |= 1 << 3; /*10 Enconding 2 - External ref clk is selected*/ + } + if ((s->C1 & 0x80) && (value >> 6 == 0)) { + s->S |= 1 << 2; /*11 Enconding 3 - Output of the PLL is selected*/ + } + s->C1 = value; + break; + case 0x01: + s->C2 = value; + break; + case 0x02: + s->C3 = value; + break; + case 0x03: + s->C4 = value; + break; + case 0x04: + s->C5 = value; + if (s->C5 & 1 << 6) { /*PLLCLKEN0*/ + s->S |= 1 << 6; /*LOCK0*/ + } + break; + case 0x05: + s->C6 = value; + if (s->C6 & 1 << 6) { /*PLLS*/ + s->S |= 1 << 5; /*PLLST*/ + } + break; + case 0x06: + s->S = value; + break; + case 0x08: + s->SC = value; + break; + case 0x0A: + s->ATCVH = value; + break; + case 0x0B: + s->ATCVL = value; + break; + case 0x0C: + s->C7 = value; + break; + case 0x0D: + s->C8 = value; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "kinetis_k64_mcg: write at bad offset 0x%x\n", (int)offset); + } +} + +static uint64_t kinetis_k64_mcg_read(void *opaque, hwaddr offset, unsigned size) +{ + kinetis_k64_mcg_state *s = (kinetis_k64_mcg_state *)opaque; + uint8_t value; + + switch (offset) { + case 0x00: /**< MCG Control 1 Register, offset: 0x0 */ + value = s->C1; + break; + case 0x01: /**< MCG Control 2 Register, offset: 0x1 */ + value = s->C2; + break; + case 0x02: /**< MCG Control 3 Register, offset: 0x2 */ + value = s->C3; + break; + case 0x03: /**< MCG Control 4 Register, offset: 0x3 */ + value = s->C4; + break; + case 0x04: /**< MCG Control 5 Register, offset: 0x4 */ + value = s->C5; + break; + case 0x05: /**< MCG Control 6 Register, offset: 0x5 */ + value = s->C6; + break; + case 0x06: /**< MCG Status Register, offset: 0x6 */ + value = s->S; + break; + case 0x08: /**< MCG Status and Control Register, offset: 0x8 */ + value = s->SC; + break; + case 0x0A: /**< MCG Auto Trim Compare Value High Register, offset: 0xA*/ + value = s->ATCVH; + break; + case 0x0B: /**< MCG Auto Trim Compare Value Low Register, offset: 0xB */ + value = s->ATCVL; + break; + case 0x0C: /**< MCG Control 7 Register, offset: 0xC */ + value = s->C7; + break; + case 0x0D: /**< MCG Control 8 Register, offset: 0xD */ + value = s->C8; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "kinetis_k64_mcg: read at bad offset 0x%x\n", (int)offset); + return 0; + } + return value; +} + +static const MemoryRegionOps kinetis_k64_mcg_ops = { + .read = kinetis_k64_mcg_read, + .write = kinetis_k64_mcg_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +static void kinetis_k64_mcg_init(Object *obj) +{ + kinetis_k64_mcg_state *s = KINETIS_K64_MCG(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->iomem, obj, &kinetis_k64_mcg_ops, s, + TYPE_KINETIS_K64_MCG, 0x1000); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_irq(sbd, &s->irq); +} + +static void kinetis_k64_mcg_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_kinetis_k64_mcg; + dc->reset = kinetis_k64_mcg_reset; + dc->desc = "Kinetis K64 series MCG"; +} + +static const TypeInfo kinetis_k64_mcg_info = { + .name = TYPE_KINETIS_K64_MCG, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(kinetis_k64_mcg_state), + .instance_init = kinetis_k64_mcg_init, + .class_init = kinetis_k64_mcg_class_init, +}; + +static void kinetis_k64_mcg_register_types(void) +{ + type_register_static(&kinetis_k64_mcg_info); +} + +type_init(kinetis_k64_mcg_register_types)