From patchwork Fri Oct 20 15:37:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriel Costa X-Patchwork-Id: 828779 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bm84kiy4"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yJbml1Rnxz9t42 for ; Sat, 21 Oct 2017 06:42:47 +1100 (AEDT) Received: from localhost ([::1]:55436 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e5dBt-0004Af-Ay for incoming@patchwork.ozlabs.org; Fri, 20 Oct 2017 15:42:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40306) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e5dBO-00048K-Ca for qemu-devel@nongnu.org; Fri, 20 Oct 2017 15:42:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e5dBL-0004cA-9c for qemu-devel@nongnu.org; Fri, 20 Oct 2017 15:42:14 -0400 Received: from mail-qt0-x241.google.com ([2607:f8b0:400d:c0d::241]:56473) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e5dBL-0004bg-5F for qemu-devel@nongnu.org; Fri, 20 Oct 2017 15:42:11 -0400 Received: by mail-qt0-x241.google.com with SMTP id z28so19785822qtz.13 for ; Fri, 20 Oct 2017 12:42:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=5fJ0pVVnxKhz1RyHPh/lCFUYGdxNFZ7tMCPxUYoRJFw=; b=bm84kiy40TgOk25tsLhW4xiPRrd5bz4r93wiKhQwbFhLd9KtPR+LNC9BnlqZE2fSi1 purMODTDy6zO27Pc2FWw0mx3UnniAtWIjiymv8f9SyWihd9WYWSaAiO20Po4fUcXyuKK aOmK0DjveAsBSE0YrbTHEIplPmeXTEtHnKVLXIBBwgHURcUDOeAPFAjwISZHgKoBmECX Ve7OVLrJY1iyCCgeGkHLDriKertM0fUV/MnKBfBLZA9r0v07KKoUiI7jdypnWah60JIF gbjln80rn5NNpu4pGb53RhN5kJEYMjki/J4EbwcMbQN5mYV1kD+Cd0BQr4kp+XIWSL0Y TVwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5fJ0pVVnxKhz1RyHPh/lCFUYGdxNFZ7tMCPxUYoRJFw=; b=FJ+ODSiFIHEraOZPfWPrgv1AfcpLbJvnyGP1eJh3QXz0pX1hS1IA18xn0IWyziD6ea j6O3g/j504hy8nIbEpxyoFcbx/g3zjhoYBFWMyEaOZRqcVCU9mJeWR4NmG+ZAQpMv168 cOEul4/GrNcXnZKzEpOoc4wUWVjqgJ6jj5S+CZmJYp0rht86pIviTVDyZaHoBz3ZqlPc lj56hy/M6duFx6KJjmoQWCz9CpbFNo+LrIg2khnwvE/Ig/gBnCIwcjHibG2yJfobgwjp 91qU6BB7w0D0NmeP0qKYGKe+yW8CQnrokd5aoHSzRlOgL44zv4Oo8ffPpqCWsBFpaZCO v1tA== X-Gm-Message-State: AMCzsaVNtv7E3In1pebtfGygTq4qT7hiNu9uhzogO3Y2zjfLA9npO3GB xJtdUGbW90BsZMUGgsq2pLGp3a6y X-Google-Smtp-Source: ABhQp+SDs0vW976YvYTP/M73JI85Gb56IGazRuel0F8d7q4JcZqOXusPqvjJXA62s0uwtY4WkkA1Mw== X-Received: by 10.200.42.219 with SMTP id c27mr9472579qta.28.1508528530465; Fri, 20 Oct 2017 12:42:10 -0700 (PDT) Received: from localhost.localdomain ([208.94.106.99]) by smtp.gmail.com with ESMTPSA id p39sm1128374qta.18.2017.10.20.12.42.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Oct 2017 12:42:09 -0700 (PDT) From: Gabriel Augusto Costa To: qemu-devel@nongnu.org Date: Fri, 20 Oct 2017 11:37:54 -0400 Message-Id: <1508513874-15580-1-git-send-email-gabriel291075@gmail.com> X-Mailer: git-send-email 2.1.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::241 Subject: [Qemu-devel] [PATCH v3 02/11] kinetis_k64_mcg.h has been added X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" I made a new arm machine with some peripherals. The machine is mk64fn1m0, a cortex-m4 microcontroller from NXP Kinetis family. The machine can run a simple arm binary file using UART0 in polling mode. I have prepared a series of patchs to include this machine: PATCH v3 n/11: It adds the machine and peripherals devices; PATCH v4 n/2: It changes the Make files to compile this machine. Signed-off-by: Gabriel Augusto Costa --- include/hw/misc/kinetis_k64_mcg.h | 47 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 include/hw/misc/kinetis_k64_mcg.h diff --git a/include/hw/misc/kinetis_k64_mcg.h b/include/hw/misc/kinetis_k64_mcg.h new file mode 100644 index 0000000..aac7731 --- /dev/null +++ b/include/hw/misc/kinetis_k64_mcg.h @@ -0,0 +1,47 @@ +/* + * Kinetis K64 peripheral microcontroller emulation. + * + * Copyright (c) 2017 Advantech Wireless + * Written by Gabriel Costa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +/* Kinetis K64 series MCG controller. */ + +#ifndef KINETIS_MCG_H +#define KINETIS_MCG_H + +#include "hw/sysbus.h" +#include "chardev/char-fe.h" +#include "chardev/char-mux.h" +#include "hw/hw.h" + +#define TYPE_KINETIS_K64_MCG "kinetis_k64_mcg" +#define KINETIS_K64_MCG(obj) \ + OBJECT_CHECK(kinetis_k64_mcg_state, (obj), TYPE_KINETIS_K64_MCG) + +typedef struct { + SysBusDevice parent_obj; + + MemoryRegion iomem; + + uint8_t C1; /**< MCG Control 1 Register, offset: 0x0 */ + uint8_t C2; /**< MCG Control 2 Register, offset: 0x1 */ + uint8_t C3; /**< MCG Control 3 Register, offset: 0x2 */ + uint8_t C4; /**< MCG Control 4 Register, offset: 0x3 */ + uint8_t C5; /**< MCG Control 5 Register, offset: 0x4 */ + uint8_t C6; /**< MCG Control 6 Register, offset: 0x5 */ + uint8_t S; /**< MCG Status Register, offset: 0x6 */ + uint8_t SC; /**< MCG Status and Control Register, offset: 0x8 */ + uint8_t ATCVH; /**< MCG Auto Trim Compare Value High Register, offset:0xA*/ + uint8_t ATCVL; /**< MCG Auto Trim Compare Value Low Register, offset:0xB*/ + uint8_t C7; /**< MCG Control 7 Register, offset: 0xC */ + uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */ + + qemu_irq irq; +} kinetis_k64_mcg_state; + +#endif