diff mbox series

[v2,18/40] openrisc: use generic cpu_model parsing

Message ID 1507211474-188400-19-git-send-email-imammedo@redhat.com
State New
Headers show
Series generalize parsing of cpu_model (part 2) | expand

Commit Message

Igor Mammedov Oct. 5, 2017, 1:50 p.m. UTC 
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
CC: shorne@gmail.com
---
 hw/openrisc/openrisc_sim.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

Comments

Stafford Horne Oct. 7, 2017, 12:13 a.m. UTC | #1 
On Thu, Oct 05, 2017 at 03:50:52PM +0200, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Less lines of code, thanks.

Acked-by: Stafford Horne <shorne@gmail.com>

> ---
> CC: shorne@gmail.com
> ---
>  hw/openrisc/openrisc_sim.c | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index 86bf284..f61b63d 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -98,18 +98,13 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
>  static void openrisc_sim_init(MachineState *machine)
>  {
>      ram_addr_t ram_size = machine->ram_size;
> -    const char *cpu_model = machine->cpu_model;
>      const char *kernel_filename = machine->kernel_filename;
>      OpenRISCCPU *cpu = NULL;
>      MemoryRegion *ram;
>      int n;
>  
> -    if (!cpu_model) {
> -        cpu_model = "or1200";
> -    }
> -
>      for (n = 0; n < smp_cpus; n++) {
> -        cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
> +        cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
>          qemu_register_reset(main_cpu_reset, cpu);
>          main_cpu_reset(cpu);
>      }
> @@ -138,6 +133,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
>      mc->init = openrisc_sim_init;
>      mc->max_cpus = 1;
>      mc->is_default = 1;
> +    mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
>  }
>  
>  DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
> -- 
> 2.7.4
>
diff mbox series

Patch

diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 86bf284..f61b63d 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -98,18 +98,13 @@  static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
 static void openrisc_sim_init(MachineState *machine)
 {
     ram_addr_t ram_size = machine->ram_size;
-    const char *cpu_model = machine->cpu_model;
     const char *kernel_filename = machine->kernel_filename;
     OpenRISCCPU *cpu = NULL;
     MemoryRegion *ram;
     int n;
 
-    if (!cpu_model) {
-        cpu_model = "or1200";
-    }
-
     for (n = 0; n < smp_cpus; n++) {
-        cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
+        cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
         qemu_register_reset(main_cpu_reset, cpu);
         main_cpu_reset(cpu);
     }
@@ -138,6 +133,7 @@  static void openrisc_sim_machine_init(MachineClass *mc)
     mc->init = openrisc_sim_init;
     mc->max_cpus = 1;
     mc->is_default = 1;
+    mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
 }
 
 DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)