From patchwork Sun Sep 10 16:35:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 812166 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xqxWf6yPNz9ryT for ; Mon, 11 Sep 2017 02:35:57 +1000 (AEST) Received: from localhost ([::1]:53599 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5D9-0002R9-El for incoming@patchwork.ozlabs.org; Sun, 10 Sep 2017 12:35:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44028) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5Cl-0002R1-BJ for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:35:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr5Ci-00089U-6R for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:35:31 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:56924) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5Ch-00089K-Ry for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:35:28 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGZQxi020634; Sun, 10 Sep 2017 18:35:26 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id BF0AD1B8; Sun, 10 Sep 2017 18:35:20 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:35:19 +0300 Message-Id: <150506131942.19604.1306593039321280342.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGZQxi020634 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 6/7] trace: Add event "guest_inst_after" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Lluís Vilanova --- accel/tcg/translator.c | 23 ++++++++++++++++++----- trace-events | 8 ++++++++ 2 files changed, 26 insertions(+), 5 deletions(-) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index d66d601c89..c010aeee45 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -35,7 +35,8 @@ void translator_loop_temp_check(DisasContextBase *db) void translator_loop(const TranslatorOps *ops, DisasContextBase *db, CPUState *cpu, TranslationBlock *tb) { - target_ulong pc_bbl; + target_ulong pc_bbl, pc_insn = 0; + bool translated_insn = false; int max_insns; /* Initialize DisasContext */ @@ -75,10 +76,15 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ while (true) { - target_ulong pc_insn = db->pc_next; TCGv_i32 insn_size_tcg = 0; int insn_size_opcode_idx; + /* Tracing after (previous instruction) */ + if (db->num_insns > 0) { + trace_guest_inst_after_tcg(cpu, tcg_ctx.tcg_env, pc_insn); + } + pc_insn = db->pc_next; + db->num_insns++; if (db->num_insns == 1) { tcg_ctx.disas.in_guest_code = true; @@ -136,6 +142,7 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, ops->translate_insn(db, cpu); } + translated_insn = true; /* Tracing after (patched values) */ if (TRACE_GUEST_INST_INFO_BEFORE_EXEC_ENABLED) { unsigned int insn_size = db->pc_next - pc_insn; @@ -156,7 +163,8 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, } /* Tracing after */ - if (TRACE_GUEST_BBL_AFTER_ENABLED) { + if (TRACE_GUEST_BBL_AFTER_ENABLED || + TRACE_GUEST_INST_AFTER_ENABLED) { tcg_ctx.disas.in_guest_code = false; if (tcg_ctx.disas.inline_label == NULL) { tcg_ctx.disas.inline_label = gen_new_inline_label(); @@ -164,6 +172,9 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, gen_set_inline_region_begin(tcg_ctx.disas.inline_label); + if (TRACE_GUEST_INST_AFTER_ENABLED && translated_insn) { + trace_guest_inst_after_tcg(cpu, tcg_ctx.tcg_env, pc_insn); + } if (TRACE_GUEST_BBL_AFTER_ENABLED) { trace_guest_bbl_after_tcg(cpu, tcg_ctx.tcg_env, pc_bbl); } @@ -195,7 +206,8 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, void translator__gen_goto_tb(TCGContext *ctx) { if (ctx->disas.in_guest_code && - (TRACE_GUEST_BBL_AFTER_ENABLED)) { + (TRACE_GUEST_BBL_AFTER_ENABLED || + TRACE_GUEST_INST_AFTER_ENABLED)) { if (ctx->disas.inline_label == NULL) { ctx->disas.inline_label = gen_new_inline_label(); } @@ -208,7 +220,8 @@ void translator__gen_goto_tb(TCGContext *ctx) void translator__gen_exit_tb(TCGContext *ctx) { if (ctx->disas.in_guest_code && !ctx->disas.seen_goto_tb && - (TRACE_GUEST_BBL_AFTER_ENABLED)) { + (TRACE_GUEST_BBL_AFTER_ENABLED || + TRACE_GUEST_INST_AFTER_ENABLED)) { if (ctx->disas.inline_label == NULL) { ctx->disas.inline_label = gen_new_inline_label(); } diff --git a/trace-events b/trace-events index ce54bb4993..c477302d8d 100644 --- a/trace-events +++ b/trace-events @@ -118,6 +118,14 @@ vcpu tcg guest_bbl_after(uint64_t vaddr) "vaddr=0x%016"PRIx64, "vaddr=0x%016"PRI # Targets: TCG(all) vcpu tcg guest_inst_before(uint64_t vaddr) "vaddr=0x%016"PRIx64, "vaddr=0x%016"PRIx64 +# @vaddr: Instruction's virtual address +# +# Mark end of instruction execution (after its operations have taken effect). +# +# Mode: user, softmmu +# Targets: TCG(all) +vcpu tcg guest_inst_after(uint64_t vaddr) "vaddr=0x%016"PRIx64, "vaddr=0x%016"PRIx64 + # @vaddr: Instruction's virtual address # @size: Instruction's size in bytes #