@@ -437,6 +437,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
smmu->type = ACPI_IORT_NODE_SMMU_V3;
smmu->length = cpu_to_le16(node_size);
+ smmu->model = 0x3; /* ACPI_IORT_SMMU_V3_CACHING_MODE */
smmu->mapping_count = cpu_to_le32(1);
smmu->mapping_offset = cpu_to_le32(sizeof(*smmu));
smmu->base_address = cpu_to_le64(vms->memmap[VIRT_SMMU].base);
@@ -444,6 +445,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
smmu->pri_gsiv = cpu_to_le32(irq + 1);
smmu->gerr_gsiv = cpu_to_le32(irq + 2);
smmu->sync_gsiv = cpu_to_le32(irq + 3);
+ smmu->flags = 0x1; /* COHACC Override */
/* Identity RID mapping covering the whole input RID range */
idmap = &smmu->id_mapping_array[0];
To allow VFIO use case, let's set the smmu model to ACPI_IORT_SMMU_V3_CACHING_MODE. An important notice is this model is not standardized in the ACPI IORT as this work is a proof of concept. We also set the COHACC override flag which seems to be mandated. Signed-off-by: Eric Auger <eric.auger@redhat.com> --- hw/arm/virt-acpi-build.c | 2 ++ 1 file changed, 2 insertions(+)