Message ID | 1500604635-15027-1-git-send-email-yongbok.kim@imgtec.com |
---|---|
State | New |
Headers | show |
On 21 July 2017 at 03:37, Yongbok Kim <yongbok.kim@imgtec.com> wrote: > The following changes since commit 25d0233c1ac6cd14a15fcc834f1de3b179037b1d: > > Merge remote-tracking branch 'remotes/kraxel/tags/ui-20170720-pull-request' into staging (2017-07-20 16:40:01 +0100) > > are available in the git repository at: > > git://github.com/yongbok/upstream-qemu.git tags/mips-20170721 > > for you to fetch changes up to bad63a8008a0aaefcd00542c89bee01623d7c9de: > > target/mips: Enable CP0_EBase.WG on MIPS64 CPUs (2017-07-21 03:23:44 +0100) > > ---------------------------------------------------------------- > MIPS patches 2017-07-21 > > Changes: > * Add Enhanced Virtual Addressing (EVA) support > > ---------------------------------------------------------------- > > > James Hogan (14): > target/mips: Fix MIPS64 MFC0 UserLocal on BE host > target/mips: Fix TLBWI shadow flush for EHINV,XI,RI > target/mips: Weaken TLB flush on UX,SX,KX,ASID changes > target/mips: Add CP0_Ebase.WG (write gate) support > target/mips: Prepare loads/stores for EVA > target/mips: Decode MIPS32 EVA load & store instructions > target/mips: Decode microMIPS EVA load & store instructions > target/mips: Check memory permissions with mem_idx > target/mips: Abstract mmu_idx from hflags > target/mips: Add an MMU mode for ERL > target/mips: Add segmentation control registers > target/mips: Implement segmentation control > target/mips: Add EVA support to P5600 > target/mips: Enable CP0_EBase.WG on MIPS64 CPUs > Applied, thanks. -- PMM