From patchwork Sun Jun 25 09:16:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 780445 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wwRQG3x28z9sBR for ; Sun, 25 Jun 2017 19:16:38 +1000 (AEST) Received: from localhost ([::1]:41784 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dP3em-0002rt-58 for incoming@patchwork.ozlabs.org; Sun, 25 Jun 2017 05:16:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59455) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dP3eU-0002ro-Ja for qemu-devel@nongnu.org; Sun, 25 Jun 2017 05:16:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dP3eP-0004MO-M7 for qemu-devel@nongnu.org; Sun, 25 Jun 2017 05:16:18 -0400 Received: from roura.ac.upc.edu ([147.83.33.10]:36043 helo=roura.ac.upc.es) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dP3eP-0004M2-AC for qemu-devel@nongnu.org; Sun, 25 Jun 2017 05:16:13 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v5P9G8Hm019497; Sun, 25 Jun 2017 11:16:08 +0200 Received: from localhost (unknown [132.68.53.125]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id 6A201783; Sun, 25 Jun 2017 11:16:03 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 25 Jun 2017 12:16:02 +0300 Message-Id: <149838216212.6497.525465762648907622.stgit@frigg.lan> X-Mailer: git-send-email 2.11.0 In-Reply-To: <149838022308.6497.2104916050645246693.stgit@frigg.lan> References: <149838022308.6497.2104916050645246693.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v5P9G8Hm019497 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v9 08/26] target: [tcg, i386] Refactor init_globals X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Peter Crosthwaite , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Incrementally paves the way towards using the generic instruction translation loop. Signed-off-by: Lluís Vilanova --- target/i386/translate.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 84ff49030b..f0d12a3d13 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8452,6 +8452,22 @@ static void i386_trblock_init_disas_context(DisasContextBase *db, CPUState *cpu) #endif } +static void i386_trblock_init_globals(DisasContextBase *db, CPUState *cpu) +{ + cpu_T0 = tcg_temp_new(); + cpu_T1 = tcg_temp_new(); + cpu_A0 = tcg_temp_new(); + + cpu_tmp0 = tcg_temp_new(); + cpu_tmp1_i64 = tcg_temp_new_i64(); + cpu_tmp2_i32 = tcg_temp_new_i32(); + cpu_tmp3_i32 = tcg_temp_new_i32(); + cpu_tmp4 = tcg_temp_new(); + cpu_ptr0 = tcg_temp_new_ptr(); + cpu_ptr1 = tcg_temp_new_ptr(); + cpu_cc_srcT = tcg_temp_local_new(); +} + /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) { @@ -8469,18 +8485,7 @@ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) db->pc_next = db->pc_first; i386_trblock_init_disas_context(db, cpu); - cpu_T0 = tcg_temp_new(); - cpu_T1 = tcg_temp_new(); - cpu_A0 = tcg_temp_new(); - - cpu_tmp0 = tcg_temp_new(); - cpu_tmp1_i64 = tcg_temp_new_i64(); - cpu_tmp2_i32 = tcg_temp_new_i32(); - cpu_tmp3_i32 = tcg_temp_new_i32(); - cpu_tmp4 = tcg_temp_new(); - cpu_ptr0 = tcg_temp_new_ptr(); - cpu_ptr1 = tcg_temp_new_ptr(); - cpu_cc_srcT = tcg_temp_local_new(); + i386_trblock_init_globals(db, cpu); num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK;