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Tue, 20 Jun 2017 12:41:17 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 89BD71108E79; Tue, 20 Jun 2017 14:41:08 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 14:40:46 +0200 Message-Id: <1497962468-22936-20-git-send-email-armbru@redhat.com> In-Reply-To: <1497962468-22936-1-git-send-email-armbru@redhat.com> References: <1497962468-22936-1-git-send-email-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Tue, 20 Jun 2017 12:41:17 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL v2 19/41] qdev: Use appropriate getter/setters type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Marc-André Lureau Based on the underlying type of the data accessed, use the appropriate getters/setters: * AcpiPmInfo members s3_disabled, s4_disabled are bool, member s4_val is an uint8_t * Property ACPI_PCIHP_IO_PROP is defined with object_property_add_uint32_ptr() * Property PCIE_HOST_MCFG_SIZE is implemented with visit_type_uint64() * PCIDevice property "addr" is backed by PCIDevice member devfn, which is an int32_t Signed-off-by: Marc-André Lureau Message-Id: <20170607163635.17635-20-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster [More verbose commit message] Signed-off-by: Markus Armbruster --- hw/i386/acpi-build.c | 12 ++++++------ hw/pci-host/gpex.c | 2 +- hw/pci-host/q35.c | 2 +- hw/pci-host/xilinx-pcie.c | 2 +- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 3eb4367..b2dc3d8 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -149,21 +149,21 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) /* Fill in optional s3/s4 related properties */ o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); if (o) { - pm->s3_disabled = qnum_get_int(qobject_to_qnum(o)); + pm->s3_disabled = qnum_get_uint(qobject_to_qnum(o)); } else { pm->s3_disabled = false; } qobject_decref(o); o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_DISABLED, NULL); if (o) { - pm->s4_disabled = qnum_get_int(qobject_to_qnum(o)); + pm->s4_disabled = qnum_get_uint(qobject_to_qnum(o)); } else { pm->s4_disabled = false; } qobject_decref(o); o = object_property_get_qobject(obj, ACPI_PM_PROP_S4_VAL, NULL); if (o) { - pm->s4_val = qnum_get_int(qobject_to_qnum(o)); + pm->s4_val = qnum_get_uint(qobject_to_qnum(o)); } else { pm->s4_val = false; } @@ -528,7 +528,7 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus, bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL); if (bsel) { - int64_t bsel_val = qnum_get_int(qobject_to_qnum(bsel)); + uint64_t bsel_val = qnum_get_uint(qobject_to_qnum(bsel)); aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val))); notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED); @@ -638,7 +638,7 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus, /* If bus supports hotplug select it and notify about local events */ if (bsel) { - int64_t bsel_val = qnum_get_int(qobject_to_qnum(bsel)); + uint64_t bsel_val = qnum_get_uint(qobject_to_qnum(bsel)); aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM"))); aml_append(method, @@ -2619,7 +2619,7 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) o = object_property_get_qobject(pci_host, PCIE_HOST_MCFG_SIZE, NULL); assert(o); - mcfg->mcfg_size = qnum_get_int(qobject_to_qnum(o)); + mcfg->mcfg_size = qnum_get_uint(qobject_to_qnum(o)); qobject_decref(o); return true; } diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index e2629ce..83084b9 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -94,7 +94,7 @@ static void gpex_host_initfn(Object *obj) object_initialize(root, sizeof(*root), TYPE_GPEX_ROOT_DEVICE); object_property_add_child(obj, "gpex_root", OBJECT(root), NULL); - qdev_prop_set_uint32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); + qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); } diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index c2f2af5..564f6cb 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -172,7 +172,7 @@ static void q35_host_initfn(Object *obj) object_initialize(&s->mch, sizeof(s->mch), TYPE_MCH_PCI_DEVICE); object_property_add_child(OBJECT(s), "mch", OBJECT(&s->mch), NULL); - qdev_prop_set_uint32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0)); + qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "uint32", diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index a968cea..2c78dcf 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -150,7 +150,7 @@ static void xilinx_pcie_host_init(Object *obj) object_initialize(root, sizeof(*root), TYPE_XILINX_PCIE_ROOT); object_property_add_child(obj, "root", OBJECT(root), NULL); - qdev_prop_set_uint32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); + qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); }