From patchwork Tue Jun 13 14:06:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 775266 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wnBzn4VRTz9s8N for ; Wed, 14 Jun 2017 00:32:05 +1000 (AEST) Received: from localhost ([::1]:43605 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dKmrT-0006Nx-8I for incoming@patchwork.ozlabs.org; Tue, 13 Jun 2017 10:32:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33237) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dKmTf-0005LJ-FQ for qemu-devel@nongnu.org; Tue, 13 Jun 2017 10:07:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dKmTe-0006kk-74 for qemu-devel@nongnu.org; Tue, 13 Jun 2017 10:07:27 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:37257) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dKmTd-0006cz-V3 for qemu-devel@nongnu.org; Tue, 13 Jun 2017 10:07:26 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dKmTO-000123-3f for qemu-devel@nongnu.org; Tue, 13 Jun 2017 15:07:10 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 13 Jun 2017 15:06:52 +0100 Message-Id: <1497362826-21125-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497362826-21125-1-git-send-email-peter.maydell@linaro.org> References: <1497362826-21125-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/17] hw/timer/exynos4210_mct: Cleanup indentation and empty new lines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Krzysztof Kozlowski Statements under 'case' were in some places wrongly indented bringing confusion and making the code less readable. Remove also few unneeded blank lines. No functional changes. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- hw/timer/exynos4210_mct.c | 45 ++++++++++++++++++++------------------------- 1 file changed, 20 insertions(+), 25 deletions(-) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index 2404fb7..ea5f99d 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -1016,9 +1016,9 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset, case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3): case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3): - index = GET_G_COMP_IDX(offset); - shift = 8 * (offset & 0x4); - value = UINT32_MAX & (s->g_timer.reg.comp[index] >> shift); + index = GET_G_COMP_IDX(offset); + shift = 8 * (offset & 0x4); + value = UINT32_MAX & (s->g_timer.reg.comp[index] >> shift); break; case G_TCON: @@ -1067,7 +1067,6 @@ static uint64_t exynos4210_mct_read(void *opaque, hwaddr offset, lt_i = GET_L_TIMER_IDX(offset); value = exynos4210_lfrc_get_count(&s->l_timer[lt_i]); - break; case L0_TCON: case L1_TCON: @@ -1153,23 +1152,23 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3): case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3): - index = GET_G_COMP_IDX(offset); - shift = 8 * (offset & 0x4); - s->g_timer.reg.comp[index] = - (s->g_timer.reg.comp[index] & - (((uint64_t)UINT32_MAX << 32) >> shift)) + - (value << shift); + index = GET_G_COMP_IDX(offset); + shift = 8 * (offset & 0x4); + s->g_timer.reg.comp[index] = + (s->g_timer.reg.comp[index] & + (((uint64_t)UINT32_MAX << 32) >> shift)) + + (value << shift); - DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift); + DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift); - if (offset & 0x4) { - s->g_timer.reg.wstat |= G_WSTAT_COMP_U(index); - } else { - s->g_timer.reg.wstat |= G_WSTAT_COMP_L(index); - } + if (offset & 0x4) { + s->g_timer.reg.wstat |= G_WSTAT_COMP_U(index); + } else { + s->g_timer.reg.wstat |= G_WSTAT_COMP_L(index); + } - exynos4210_gfrc_restart(s); - break; + exynos4210_gfrc_restart(s); + break; case G_TCON: old_val = s->g_timer.reg.tcon; @@ -1207,7 +1206,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, break; case G_INT_ENB: - /* Raise IRQ if transition from disabled to enabled and CSTAT pending */ for (i = 0; i < MCT_GT_CMP_NUM; i++) { if ((value & G_INT_ENABLE(i)) > (s->g_timer.reg.tcon & @@ -1288,7 +1286,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, break; case L0_TCNTB: case L1_TCNTB: - lt_i = GET_L_TIMER_IDX(offset); index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); @@ -1316,7 +1313,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, break; case L0_ICNTB: case L1_ICNTB: - lt_i = GET_L_TIMER_IDX(offset); index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i); @@ -1353,13 +1349,12 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset, if (icntb_max[lt_i] < value) { icntb_max[lt_i] = value; } -DPRINTF("local timer[%d] ICNTB write %llx; max=%x, min=%x\n\n", - lt_i, value, icntb_max[lt_i], icntb_min[lt_i]); + DPRINTF("local timer[%d] ICNTB write %llx; max=%x, min=%x\n\n", + lt_i, value, icntb_max[lt_i], icntb_min[lt_i]); #endif -break; + break; case L0_FRCNTB: case L1_FRCNTB: - lt_i = GET_L_TIMER_IDX(offset); index = GET_L_TIMER_CNT_REG_IDX(offset, lt_i);