From patchwork Fri Mar 31 07:36:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 745519 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vvYKL4spYz9s0g for ; Fri, 31 Mar 2017 18:39:02 +1100 (AEDT) Received: from localhost ([::1]:39350 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ctr9A-0002EU-7q for incoming@patchwork.ozlabs.org; Fri, 31 Mar 2017 03:39:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39263) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ctr7j-0001Sq-AM for qemu-devel@nongnu.org; Fri, 31 Mar 2017 03:37:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ctr7i-00073T-Gb for qemu-devel@nongnu.org; Fri, 31 Mar 2017 03:37:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:17342) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ctr7i-000731-8n for qemu-devel@nongnu.org; Fri, 31 Mar 2017 03:37:30 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3E9AE15552; Fri, 31 Mar 2017 07:37:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 3E9AE15552 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 3E9AE15552 Received: from pxdev.xzpeter.org.com (ovpn-8-59.pek2.redhat.com [10.72.8.59]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6563A18146; Fri, 31 Mar 2017 07:37:22 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Fri, 31 Mar 2017 15:36:32 +0800 Message-Id: <1490945793-21276-5-git-send-email-peterx@redhat.com> In-Reply-To: <1490945793-21276-1-git-send-email-peterx@redhat.com> References: <1490945793-21276-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Fri, 31 Mar 2017 07:37:29 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-2.10 4/5] q35: init vIOMMU during machine init X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, kevin.tian@intel.com, yi.l.liu@intel.com, "\\ Michael S . Tsirkin \\ " , Jason Wang , Markus Armbruster , peterx@redhat.com, Marcel Apfelbaum , Paolo Bonzini Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Now x86 vIOMMUs are init along with all the rest of "-devices". That may not be sufficient since some devices' realization will depend on the vIOMMU object. Let's move the vIOMMU init back to machine init, so that'll be far earlier than all the rest of devices. Signed-off-by: Peter Xu --- hw/pci-host/q35.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 344f77b..c5becea 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -28,6 +28,8 @@ * THE SOFTWARE. */ #include "qemu/osdep.h" +#include "qemu/option.h" +#include "qemu/config-file.h" #include "hw/hw.h" #include "hw/pci-host/q35.h" #include "qapi/error.h" @@ -460,6 +462,26 @@ static void mch_reset(DeviceState *qdev) mch_update(mch); } +static int x86_iommu_detecter(void *opaque, QemuOpts *opts, Error **errp) +{ + const char *driver = qemu_opt_get(opts, "driver"); + + if (!driver) { + /* + * We don't need to set any error here. It'll be invoked later + * when init all the devices. Here we can just concentrate on + * the IOMMU device. + */ + return -1; + } + + if (!strcmp(driver, "intel-iommu") || !strcmp(driver, "amd-iommu")) { + return 0; + } + + return -1; +} + static void mch_realize(PCIDevice *d, Error **errp) { int i; @@ -518,6 +540,29 @@ static void mch_realize(PCIDevice *d, Error **errp) mch->pci_address_space, &mch->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } + + /* + * Initialize vIOMMUs during machine init. Now we have vIOMMUs + * configured with "-device", let's try to pick them out in the + * device list, and init them before the rest of the devices (some + * device will depend on the vIOMMU during its realization). + * + * TODO: support multiple vIOMMUs. This loop prepares for that. + */ + while (1) { + QemuOpts *iommu_opts; + + iommu_opts = qemu_opts_extract(qemu_find_opts("device"), + x86_iommu_detecter, NULL, errp); + if (!iommu_opts) { + break; + } + + /* Found one IOMMU device, init it */ + if (device_init_func(NULL, iommu_opts, errp)) { + return; + } + } } uint64_t mch_mcfg_base(void)