From patchwork Wed Mar 22 13:32:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 742051 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vp9hT3bFKz9s7R for ; Thu, 23 Mar 2017 00:36:57 +1100 (AEDT) Received: from localhost ([::1]:51127 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqgRb-0001Nk-0J for incoming@patchwork.ozlabs.org; Wed, 22 Mar 2017 09:36:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44366) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqgNy-000748-9T for qemu-devel@nongnu.org; Wed, 22 Mar 2017 09:33:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cqgNx-0001lW-DF for qemu-devel@nongnu.org; Wed, 22 Mar 2017 09:33:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32828) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cqgNp-0001ii-IN; Wed, 22 Mar 2017 09:33:01 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 87C9580482; Wed, 22 Mar 2017 13:33:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 87C9580482 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 87C9580482 Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8C6286046C; Wed, 22 Mar 2017 13:32:59 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 22 Mar 2017 14:32:29 +0100 Message-Id: <1490189568-167621-5-git-send-email-imammedo@redhat.com> In-Reply-To: <1490189568-167621-1-git-send-email-imammedo@redhat.com> References: <1490189568-167621-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 22 Mar 2017 13:33:01 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-2.10 04/23] hw/arm/virt: explicitly allocate cpu_index for cpus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Currently cpu_index is implicitly auto assigned during cpu.realize() time cpu_exec_realizefn()->cpu_list_add(). It happens to match index in possible_cpus so take control over it and make board initialize cpu_index to possible_cpus index explicitly. It will at least document that board is in control of it and when '-device cpu' support comes it will keep cpu_index stable regardless of order cpus are created so it won't break migration. Within this series it will be used for internal conversion from storing cpu_index based NUMA node bitmaps to property based mapping with possible_cpus, And will allow map cpu_index to a CPU entry in possible_cpus array. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones --- hw/arm/virt.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4de46b1..0cbcbc1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1364,6 +1364,7 @@ static void machvirt_init(MachineState *machine) mc->possible_cpu_arch_ids(machine); for (n = 0; n < machine->possible_cpus->len; n++) { Object *cpuobj; + CPUState *cs; if (n >= smp_cpus) { break; @@ -1373,6 +1374,9 @@ static void machvirt_init(MachineState *machine) object_property_set_int(cpuobj, machine->possible_cpus->cpus[n].arch_id, "mp-affinity", NULL); + cs = CPU(cpuobj); + cs->cpu_index = n; + if (!vms->secure) { object_property_set_bool(cpuobj, false, "has_el3", NULL); }